| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonEarlyIfConv.cpp | 131 unsigned PredR = 0; member
253 Register PredR = T1I->getOperand(0).getReg(); in matchFlowPattern() local
709 predicateInstr(MachineBasicBlock * ToB,MachineBasicBlock::iterator At,MachineInstr * MI,unsigned PredR,bool IfTrue) predicateInstr() argument
760 predicateBlockNB(MachineBasicBlock * ToB,MachineBasicBlock::iterator At,MachineBasicBlock * FromB,unsigned PredR,bool IfTrue) predicateBlockNB() argument
777 buildMux(MachineBasicBlock * B,MachineBasicBlock::iterator At,const TargetRegisterClass * DRC,unsigned PredR,unsigned TR,unsigned TSR,unsigned FR,unsigned FSR) buildMux() argument
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| H A D | HexagonGenMux.cpp | 92 unsigned PredR = 0; member
108 unsigned DefR, PredR; member
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| H A D | HexagonExpandCondsets.cpp | 769 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond) { in getReachingDefForPred() argument
932 renameInRange(RegisterRef RO,RegisterRef RN,unsigned PredR,bool Cond,MachineBasicBlock::iterator First,MachineBasicBlock::iterator Last) renameInRange() argument
980 Register PredR = MP.getReg(); predicate() local
[all...] |
| H A D | HexagonHardwareLoops.cpp | 464 Register PredR; in findInductionRegister() local
1334 Register PredR = CmpI->getOperand(0).getReg(); orderBumpCompare() local
1897 Register PredR = PN->getOperand(i).getReg(); createPreheaderForLoop() local
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| H A D | HexagonISelLowering.cpp | 378 Register PredR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass); in LowerCallResult() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 200 ICmpInst *RHS, ICmpInst::Predicate &PredL, ICmpInst::Predicate &PredR) { in getMaskedTypeForICmpPair() argument
330 Value *D, Value *E, ICmpInst::Predicate PredL, ICmpInst::Predicate PredR, in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed() argument
452 Value *D, Value *E, ICmpInst::Predicate PredL, ICmpInst::Predicate PredR, in foldLogOpOfMaskedICmpsAsymmetric() argument
487 ICmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); foldLogOpOfMaskedICmps() local
927 foldNegativePower2AndShiftedMask(Value * A,Value * B,Value * D,Value * E,ICmpInst::Predicate PredL,ICmpInst::Predicate PredR,InstCombiner::BuilderTy & Builder) foldNegativePower2AndShiftedMask() argument
1320 FCmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); matchIsFiniteTest() local
1338 FCmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); foldLogicOfFCmps() local
3157 ICmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); foldAndOrOfICmps() local
3975 ICmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); foldXorOfICmps() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 454 CmpInst::Predicate PredL, PredR; in isEqualImpl() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanRecipes.cpp | 1437 if (auto *PredR = dyn_cast<VPPredInstPHIRecipe>(U)) shouldPack() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 1859 FCmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); simplifyAndOrOfFCmps() local
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