Searched defs:PartTy (Results 1 – 5 of 5) sorted by relevance
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 551 buildCopyToRegs(MachineIRBuilder & B,ArrayRef<Register> DstRegs,Register SrcReg,LLT SrcTy,LLT PartTy,unsigned ExtendOp=TargetOpcode::G_ANYEXT) buildCopyToRegs() argument
1113 Type *PartTy = EVT(RegVT).getTypeForEVT(Context); getReturnInfo() local
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| H A D | LegalizerHelper.cpp | 163 insertParts(Register DstReg,LLT ResultTy,LLT PartTy,ArrayRef<Register> PartRegs,LLT LeftoverTy,ArrayRef<Register> LeftoverRegs) insertParts() argument
4509 LLT PartTy = MRI.getType(VecParts[PartIdx]); fewerElementsVectorExtractInsertVectorElt() local
4587 __anon87a70b730102(LLT PartTy, SmallVectorImpl<Register> &ValRegs, unsigned NumParts, unsigned Offset) reduceLoadStoreWidth() argument
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| /llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SROA.cpp | 4525 auto *PartTy = Type::getIntNTy(LI->getContext(), PartSize * 8); presplitLoadsAndStores() local
4666 auto *PartTy = Type::getIntNTy(Ty->getContext(), PartSize * 8); presplitLoadsAndStores() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 3203 MVT PartTy = HaveAlign <= 8 ? MVT::getIntegerVT(8 * HaveAlign) LowerUnalignedLoad() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 897 LLT PartTy = LLT::scalar(PartSize); in executeInWaterfallLoop() local
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