| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyReplacePhysRegs.cpp | 76 for (unsigned PReg = WebAssembly::NoRegister + 1; in runOnMachineFunction() local
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterUsageInfo.cpp | 93 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { print() local
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| H A D | RegUsageInfoCollector.cpp | 157 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { runOnMachineFunction() local
[all...] |
| H A D | RegAllocPBQP.cpp | 627 if (MRI.isReserved(PReg)) in initializeGraph() local
738 MCRegister PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOpt - 1]; mapPBQPToRegAlloc() local
764 Register PReg = MRI.getSimpleHint(LI.reg()); finalizeAlloc() local
[all...] |
| H A D | CallingConvLower.cpp | 254 for (MCPhysReg PReg : RemainingRegs) { in analyzeMustTailForwardedRegisters() local
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| H A D | MachineFunction.cpp | 722 addLiveIn(MCRegister PReg,const TargetRegisterClass * RC) addLiveIn() argument
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 150 MCPhysReg PReg; member
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBlockRanges.cpp | 279 MCSubRegIndexIterator I(PReg, &TRI); in expandToSubRegs() local
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| H A D | HexagonBitTracker.cpp | 1250 getNextPhysReg(unsigned PReg,unsigned Width) const getNextPhysReg() argument
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| H A D | HexagonInstrInfo.cpp | 1371 Register PReg = Op1.getReg(); expandPostRAPseudo() local
1404 Register PReg = Op1.getReg(); expandPostRAPseudo() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1018 : TRI->getEncodingValue(PReg); in FormCandidates() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 3603 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; adjustForHiPEPrologue() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2863 for (unsigned PReg = AArch64::P8; PReg <= AArch64::P15; ++PReg) { findFreePredicateReg() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1287 addLiveIn(MachineFunction & MF,unsigned PReg,const TargetRegisterClass * RC) addLiveIn() argument
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| /llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3682 auto PReg = mc2PseudoReg(Reg); usesConstantBus() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 528 Register PReg = Next->getOperand(0).getReg(); isLibCallInTailPosition() local
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