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Searched defs:Orders (Results 1 – 3 of 3) sorted by relevance

/minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp713 ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, in ProcessSDDbgValues()
743 ProcessSourceNode(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, in ProcessSourceNode()
814 SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders; in EmitSchedule() local
/minix3/external/bsd/llvm/dist/llvm/utils/TableGen/
H A DCodeGenRegisters.h272 std::vector<SmallVector<Record*, 16> > Orders; variable
/minix3/external/bsd/llvm/dist/clang/lib/CodeGen/
H A DCGBuiltin.cpp1182 llvm::AtomicOrdering Orders[5] = { in EmitBuiltinExpr() local
1249 llvm::AtomicOrdering Orders[3] = { in EmitBuiltinExpr() local