Searched defs:Orders (Results 1 – 5 of 5) sorted by relevance
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 737 ProcessSDDbgValues(SDNode * N,SelectionDAG * DAG,InstrEmitter & Emitter,SmallVectorImpl<std::pair<unsigned,MachineInstr * >> & Orders,DenseMap<SDValue,Register> & VRBaseMap,unsigned Order) ProcessSDDbgValues() argument
785 ProcessSourceNode(SDNode * N,SelectionDAG * DAG,InstrEmitter & Emitter,DenseMap<SDValue,Register> & VRBaseMap,SmallVectorImpl<std::pair<unsigned,MachineInstr * >> & Orders,SmallSet<Register,8> & Seen,MachineInstr * NewInsn) ProcessSourceNode() argument
855 SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders; EmitSchedule() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 1409 SmallVectorImpl<MachineDomTreeNode *> &Orders, in getVisitOrders() argument
1497 SmallVector<MachineDomTreeNode *, 32> Orders; runHoistSpills() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | ConstantHoisting.cpp | 258 SmallVector<BasicBlock *, 16> Orders; findBestInsertionSet() local
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| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.h | |
| /freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 4642 llvm::AtomicOrdering Orders[5] = { EmitBuiltinExpr() local
4707 llvm::AtomicOrdering Orders[3] = { EmitBuiltinExpr() local
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