| /llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMEHABIPrinter.h | 112 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_1000iiii_iiiiiiii() local
159 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_10110001_0000iiii() local
187 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_10110011_sssscccc() local
210 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_11000110_sssscccc() local
220 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_11000111_0000iiii() local
231 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_11001000_sssscccc() local
241 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_11001001_sssscccc() local
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| /llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 311 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) isLegalAltInstr() argument
588 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) getAltInstrCost() argument
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| H A D | TargetTransformInfo.h | 2410 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) isLegalAltInstr() argument
2662 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) getAltInstrCost() argument
[all...] |
| /llvm-project/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 485 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) const isLegalAltInstr() argument
921 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) const getAltInstrCost() argument
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 1519 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) const getAltInstrCost() argument
6075 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) const isLegalAltInstr() argument
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| H A D | X86ISelLowering.cpp | 41208 unsigned Opcode1 = N1.getOpcode(); combineTargetShuffle() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 852 areOpcodesEqualOrInverse(unsigned Opcode1,unsigned Opcode2) const areOpcodesEqualOrInverse() argument
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| /llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 171 static BinaryOperator *isReassociableOp(Value *V, unsigned Opcode1, in isReassociableOp() argument
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| /llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 1012 getAltInstrMask(ArrayRef<Value * > VL,unsigned Opcode0,unsigned Opcode1) getAltInstrMask() argument
5244 unsigned Opcode1 = TE->getAltOpcode(); reorderTopToBottom() local
6156 unsigned Opcode1 = S.getAltOpcode(); areAltOperandsProfitable() local
9920 unsigned Opcode1 = E->getAltOpcode(); getEntryCost() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 4276 shouldClusterFI(const MachineFrameInfo & MFI,int FI1,int64_t Offset1,unsigned Opcode1,int FI2,int64_t Offset2,unsigned Opcode2) shouldClusterFI() argument
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| H A D | AArch64ISelLowering.cpp | 17458 unsigned Opcode1 = SUB->getOperand(1).getOpcode(); performVecReduceAddCombineWithUADDLP() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5604 unsigned Opcode1 = isSignedMinMax(N00, N01, N02, N03, N0CC); isSaturatingMinMax() local
[all...] |