| /freebsd-src/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMEHABIPrinter.h | 111 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_1000iiii_iiiiiiii() local
158 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_10110001_0000iiii() local
186 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_10110011_sssscccc() local
209 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_11000110_sssscccc() local
219 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_11000111_0000iiii() local
230 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_11001000_sssscccc() local
240 uint8_t Opcode0 = Opcodes[OI++ ^ 3]; in Decode_11001001_sssscccc() local
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| /freebsd-src/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 300 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) isLegalAltInstr() argument
568 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) getAltInstrCost() argument
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| H A D | TargetTransformInfo.h | 2344 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) isLegalAltInstr() argument
2592 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) getAltInstrCost() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 475 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) const isLegalAltInstr() argument
880 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) const getAltInstrCost() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 1463 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) const getAltInstrCost() argument
6002 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) const isLegalAltInstr() argument
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| H A D | X86ISelLowering.cpp | 38630 unsigned Opcode0 = BC0.getOpcode(); canonicalizeShuffleMaskWithHorizOp() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 4347 unsigned Opcode0 = TE->getOpcode(); reorderTopToBottom() local
8465 unsigned Opcode0 = E->getOpcode(); getEntryCost() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2606 unsigned Opcode0 = C.Op0.getOpcode(); shouldSwapCmpOperands() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 16534 unsigned Opcode0 = SUB->getOperand(0).getOpcode(); performVecReduceAddCombineWithUADDLP() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5539 unsigned Opcode0 = isSignedMinMax(N0, N1, N2, N3, CC); isSaturatingMinMax() local
[all...] |