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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h343 bool isSALU(uint16_t Opcode) const { in isSALU()
351 bool isVALU(uint16_t Opcode) const { in isVALU()
359 bool isVMEM(uint16_t Opcode) const { in isVMEM()
367 bool isSOP1(uint16_t Opcode) const { in isSOP1()
375 bool isSOP2(uint16_t Opcode) const { in isSOP2()
383 bool isSOPC(uint16_t Opcode) const { in isSOPC()
391 bool isSOPK(uint16_t Opcode) const { in isSOPK()
399 bool isSOPP(uint16_t Opcode) const { in isSOPP()
407 bool isPacked(uint16_t Opcode) const { in isPacked()
415 bool isVOP1(uint16_t Opcode) const { in isVOP1()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.h146 static inline bool isSPLSOpcode(unsigned Opcode) { in isSPLSOpcode()
160 static inline bool isRMOpcode(unsigned Opcode) { in isRMOpcode()
170 static inline bool isRRMOpcode(unsigned Opcode) { in isRRMOpcode()
H A DLanaiRegisterInfo.cpp69 static bool isALUArithLoOpcode(unsigned Opcode) { in isALUArithLoOpcode()
85 static unsigned getOppositeALULoOpcode(unsigned Opcode) { in getOppositeALULoOpcode()
108 static unsigned getRRMOpcodeVariant(unsigned Opcode) { in getRRMOpcodeVariant()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetOpcodes.h30 inline bool isPreISelGenericOpcode(unsigned Opcode) { in isPreISelGenericOpcode()
36 inline bool isTargetSpecificOpcode(unsigned Opcode) { in isTargetSpecificOpcode()
42 inline bool isPreISelGenericOptimizationHint(unsigned Opcode) { in isPreISelGenericOptimizationHint()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMUnwindOpAsm.h72 void EmitInt8(unsigned Opcode) { in EmitInt8()
77 void EmitInt16(unsigned Opcode) { in EmitInt16()
83 void emitBytes(const uint8_t *Opcode, size_t Size) { in emitBytes()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-readobj/
H A DARMEHABIPrinter.h99 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
105 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
124 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
129 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
134 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
139 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
146 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
153 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
170 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
197 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_101101nn() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp109 bool SystemZShortenInst::shortenOn0(MachineInstr &MI, unsigned Opcode) { in shortenOn0()
119 bool SystemZShortenInst::shortenOn01(MachineInstr &MI, unsigned Opcode) { in shortenOn01()
131 bool SystemZShortenInst::shortenOn001(MachineInstr &MI, unsigned Opcode) { in shortenOn001()
144 bool SystemZShortenInst::shortenOn001AddCC(MachineInstr &MI, unsigned Opcode) { in shortenOn001AddCC()
157 bool SystemZShortenInst::shortenFPConv(MachineInstr &MI, unsigned Opcode) { in shortenFPConv()
179 bool SystemZShortenInst::shortenFusedFPOp(MachineInstr &MI, unsigned Opcode) { in shortenFusedFPOp()
H A DSystemZAsmPrinter.cpp33 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) { in lowerRILow()
47 static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) { in lowerRIHigh()
61 static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) { in lowerRIEfLow()
90 unsigned Opcode) { in lowerAlignmentHint()
108 static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode) { in lowerSubvectorLoad()
118 static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) { in lowerSubvectorStore()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCPredicates.cpp18 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
52 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
/netbsd-src/sys/external/bsd/acpica/dist/executer/
H A Dexmisc.c168 UINT16 Opcode, in AcpiExDoMathOp()
263 UINT16 Opcode, in AcpiExDoLogicalNumericOp()
336 UINT16 Opcode, in AcpiExDoLogicalOp()
/netbsd-src/sys/external/bsd/acpica/dist/parser/
H A Dpsopinfo.c73 UINT16 Opcode) in AcpiPsGetOpcodeInfo()
170 UINT16 Opcode) in AcpiPsGetOpcodeName()
H A Dpsutils.c100 UINT16 Opcode) in AcpiPsInitOp()
131 UINT16 Opcode, in AcpiPsAllocOp()
H A Dpsparse.c79 UINT32 Opcode) in AcpiPsGetOpcodeSize()
112 UINT16 Opcode; in AcpiPsPeekOpcode() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.cpp159 InstructionCost HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, in getMemoryOpCost()
216 HexagonTTIImpl::getMaskedMemoryOpCost(unsigned Opcode, Type *Src, in getMaskedMemoryOpCost()
230 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, in getGatherScatterOpCost()
237 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, in getInterleavedMemoryOpCost()
249 InstructionCost HexagonTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost()
263 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, in getArithmeticInstrCost()
283 InstructionCost HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy, in getCastInstrCost()
306 InstructionCost HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, in getVectorInstrCost()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCInstrInfo.h62 const MCInstrDesc &get(unsigned Opcode) const { in get()
68 StringRef getName(unsigned Opcode) const { in getName()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.cpp106 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP() local
128 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP() local
201 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList() local
262 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue() local
287 int Opcode = isImmU6(Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; in emitPrologue() local
400 int Opcode = isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6; in emitEpilogue() local
407 int Opcode = isImmU6(RemainingAdj) ? XCore::LDAWSP_ru6 : in emitEpilogue() local
510 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in eliminateCallFramePseudoInstr() local
514 int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in eliminateCallFramePseudoInstr() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h498 bool isFpMLxInstruction(unsigned Opcode) const { in isFpMLxInstruction()
512 bool canCauseFpMLxStall(unsigned Opcode) const { in canCauseFpMLxStall()
585 unsigned VCMPOpcodeToVPT(unsigned Opcode) { in VCMPOpcodeToVPT()
880 inline bool isLegalAddressImm(unsigned Opcode, int Imm, in isLegalAddressImm()
H A DMVETailPredUtils.h25 static inline unsigned VCTPOpcodeToLSTP(unsigned Opcode, bool IsDoLoop) { in VCTPOpcodeToLSTP()
42 static inline unsigned getTailPredVectorWidth(unsigned Opcode) { in getTailPredVectorWidth()
H A DARMTargetTransformInfo.cpp286 int ARMTTIImpl::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, in getIntImmCodeSizeCost()
327 InstructionCost ARMTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, in getIntImmCostInst()
382 InstructionCost ARMTTIImpl::getCFInstrCost(unsigned Opcode, in getCFInstrCost()
396 InstructionCost ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, in getCastInstrCost()
800 InstructionCost ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, in getVectorInstrCost()
836 InstructionCost ARMTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost()
1245 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, in getArithmeticInstrCost()
1386 InstructionCost ARMTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, in getMemoryOpCost()
1433 ARMTTIImpl::getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, in getMaskedMemoryOpCost()
1451 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, in getInterleavedMemoryOpCost()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DLeonPasses.cpp49 unsigned Opcode = MI.getOpcode(); in runOnMachineFunction() local
84 unsigned Opcode = MI.getOpcode(); in runOnMachineFunction() local
136 unsigned Opcode = MI.getOpcode(); in runOnMachineFunction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp88 InstructionCost AArch64TTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, in getIntImmCostInst()
511 bool AArch64TTIImpl::isWideningInstruction(Type *DstTy, unsigned Opcode, in isWideningInstruction()
577 InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, in getCastInstrCost()
853 InstructionCost AArch64TTIImpl::getExtractWithExtendCost(unsigned Opcode, in getExtractWithExtendCost()
914 InstructionCost AArch64TTIImpl::getCFInstrCost(unsigned Opcode, in getCFInstrCost()
924 InstructionCost AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, in getVectorInstrCost()
950 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, in getArithmeticInstrCost()
1097 InstructionCost AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost()
1176 AArch64TTIImpl::getMaskedMemoryOpCost(unsigned Opcode, Type *Src, in getMaskedMemoryOpCost()
1187 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, in getGatherScatterOpCost()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp109 unsigned Opcode = DefInst->getOpcode(); in checkADDrr() local
147 unsigned Opcode) { in checkShift()
177 unsigned Opcode = I->getParent()->getOpcode(); in processCandidate() local
233 unsigned Opcode = Inst->getOpcode(); in processInst() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp235 InstructionCost PPCTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, in getIntImmCostInst()
426 unsigned Opcode = 0; in mightUseCTR() local
945 unsigned Opcode, Type *Ty1, in vectorCostAdjustment()
970 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, in getArithmeticInstrCost()
1003 InstructionCost PPCTTIImpl::getCFInstrCost(unsigned Opcode, in getCFInstrCost()
1012 InstructionCost PPCTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, in getCastInstrCost()
1028 InstructionCost PPCTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost()
1041 InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, in getVectorInstrCost()
1108 InstructionCost PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, in getMemoryOpCost()
1190 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, in getInterleavedMemoryOpCost()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMips16ISelDAGToDAG.cpp53 unsigned Opcode = Mips::Mflo16; in selectMULT() local
58 unsigned Opcode = Mips::Mfhi16; in selectMULT() local
180 unsigned Opcode = Node->getOpcode(); in trySelect() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVExpandPseudoInsts.cpp250 unsigned Opcode; in expandVSetVL() local
271 unsigned Opcode) { in expandVMSET_VMCLR()
296 unsigned Opcode = RISCV::VS1R_V; in expandVSPILL() local
341 unsigned Opcode = RISCV::VL1RE8_V; in expandVRELOAD() local

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