/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 562 bool isUncondBranchOpcode(int Opc) { in isUncondBranchOpcode() 569 static inline bool isVPTOpcode(int Opc) { in isVPTOpcode() 638 bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode() 642 static inline bool isJumpTableBranchOpcode(int Opc) { in isJumpTableBranchOpcode() 648 static inline bool isLowOverheadTerminatorOpcode(int Opc) { in isLowOverheadTerminatorOpcode() 655 bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode() 660 int Opc = MI.getOpcode(); in isIndirectCall() local 713 static inline bool isSpeculationBarrierEndBBOpcode(int Opc) { in isSpeculationBarrierEndBBOpcode() 720 static inline bool isPopOpcode(int Opc) { in isPopOpcode() 726 static inline bool isPushOpcode(int Opc) { in isPushOpcode() [all …]
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H A D | ARMFastISel.cpp | 423 unsigned Opc; in ARMMaterializeFP() local 444 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; in ARMMaterializeFP() local 462 unsigned Opc = isThumb2 ? ARM::t2MOVi16 : ARM::MOVi16; in ARMMaterializeInt() local 478 unsigned Opc = isThumb2 ? ARM::t2MVNi : ARM::MVNi; in ARMMaterializeInt() local 546 unsigned Opc; in ARMMaterializeGV() local 575 unsigned Opc = IsPositionIndependent ? ARM::t2LDRpci_pic : ARM::t2LDRpci; in ARMMaterializeGV() local 591 unsigned Opc = IsIndirect ? ARM::PICLDR : ARM::PICADD; in ARMMaterializeGV() local 658 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in fastMaterializeAlloca() local 836 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in ARMSimplifyAddress() local 902 unsigned Opc; in ARMEmitLoad() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
H A D | WebAssemblyMCTargetDesc.h | 137 inline unsigned GetDefaultP2AlignAny(unsigned Opc) { in GetDefaultP2AlignAny() 266 inline unsigned GetDefaultP2Align(unsigned Opc) { in GetDefaultP2Align() 274 inline bool isArgument(unsigned Opc) { in isArgument() 306 inline bool isCopy(unsigned Opc) { in isCopy() 328 inline bool isTee(unsigned Opc) { in isTee() 350 inline bool isCallDirect(unsigned Opc) { in isCallDirect() 362 inline bool isCallIndirect(unsigned Opc) { in isCallIndirect() 386 inline bool isMarker(unsigned Opc) { in isMarker() 406 inline bool isCatch(unsigned Opc) { in isCatch()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.h | 410 static inline bool isUncondBranchOpcode(int Opc) { return Opc == AArch64::B; } in isUncondBranchOpcode() 412 static inline bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode() 429 static inline bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode() 441 static inline bool isPTrueOpcode(unsigned Opc) { in isPTrueOpcode()
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H A D | AArch64ConditionOptimizer.cpp | 218 static int getComplementOpc(int Opc) { in getComplementOpc() 245 unsigned Opc = CmpMI->getOpcode(); in adjustCmp() local 274 unsigned Opc; in modifyCmp() local
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H A D | AArch64FastISel.cpp | 403 unsigned Opc = Is64Bit ? AArch64::FMOVDi : AArch64::FMOVSi; in materializeFP() local 434 unsigned Opc = Is64Bit ? AArch64::LDRDui : AArch64::LDRSui; in materializeFP() local 546 unsigned Opc = Is64Bit ? AArch64::FMOVXDr : AArch64::FMOVWSr; in fastMaterializeFloatZero() local 1299 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rr() local 1341 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_ri() local 1385 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rs() local 1426 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rx() local 1497 unsigned Opc = (RetVT == MVT::f64) ? AArch64::FCMPDri : AArch64::FCMPSri; in emitFCmp() local 1507 unsigned Opc = (RetVT == MVT::f64) ? AArch64::FCMPDrr : AArch64::FCMPSrr; in emitFCmp() local 1651 unsigned Opc; in emitLogicalOp_ri() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyExplicitLocals.cpp | 279 unsigned Opc = getLocalGetOpcode(RC); in runOnMachineFunction() local 289 unsigned Opc = getLocalTeeOpcode(RC); in runOnMachineFunction() local 309 unsigned Opc = getDropOpcode(RC); in runOnMachineFunction() local 319 unsigned Opc = getLocalSetOpcode(RC); in runOnMachineFunction() local 380 unsigned Opc = getLocalGetOpcode(RC); in runOnMachineFunction() local
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H A D | WebAssemblyFastISel.cpp | 385 unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 in materializeLoadStoreOperands() local 604 unsigned Opc = in fastMaterializeAlloca() local 623 unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 in fastMaterializeConstant() local 661 unsigned Opc; in fastLowerArguments() local 771 unsigned Opc = IsDirect ? WebAssembly::CALL : WebAssembly::CALL_INDIRECT; in selectCall() local 927 unsigned Opc; in selectSelect() local 1028 unsigned Opc; in selectICmp() local 1097 unsigned Opc; in selectFCmp() local 1196 unsigned Opc; in selectLoad() local 1255 unsigned Opc; in selectStore() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonCFGOptimizer.cpp | 62 static bool IsConditionalBranch(int Opc) { in IsConditionalBranch() 77 static bool IsUnconditionalJump(int Opc) { in IsUnconditionalJump() 129 int Opc = MI.getOpcode(); in runOnMachineFunction() local
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H A D | HexagonGenPredicate.cpp | 144 unsigned HexagonGenPredicate::getPredForm(unsigned Opc) { in getPredForm() 189 unsigned Opc = MI->getOpcode(); in isConvertibleToPredForm() local 212 unsigned Opc = MI->getOpcode(); in collectPredicateGPR() local 258 unsigned Opc = DefI->getOpcode(); in getPredRegFor() local 287 bool HexagonGenPredicate::isScalarCmp(unsigned Opc) { in isScalarCmp() 372 unsigned Opc = MI->getOpcode(); in convertToPredForm() local
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H A D | HexagonBitSimplify.cpp | 464 bool HexagonBitSimplify::getUsedBitsInStore(unsigned Opc, BitVector &Bits, in getUsedBitsInStore() 623 bool HexagonBitSimplify::getUsedBits(unsigned Opc, unsigned OpN, in getUsedBits() 1002 unsigned Opc = MI->getOpcode(); in runOnNode() local 1084 unsigned Opc = MI.getOpcode(); in isLossyShiftLeft() local 1144 unsigned Opc = MI.getOpcode(); in isLossyShiftRight() local 1252 unsigned Opc = MI.getOpcode(); in computeUsedBits() local 1396 unsigned Opc = MI.getOpcode(); in isTfrConst() local 1433 unsigned Opc = isInt<8>(Lo) ? Hexagon::A2_combineii in genTfrConst() local 1453 unsigned Opc; in genTfrConst() local 1607 unsigned Opc = I->getOpcode(); in processBlock() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCFrameLowering.cpp | 137 unsigned Opc = ARC::SUB_rrlimm; in emitPrologue() local 254 unsigned Opc = ARC::SUB_rrlimm; in emitEpilogue() local 282 unsigned Opc = ARC::ADD_rrlimm; in emitEpilogue() local 297 unsigned Opc = ARC::ADD_rrlimm; in emitEpilogue() local 324 unsigned Opc = ARC::ADD_rrlimm; in emitEpilogue() local 454 unsigned Opc; in emitRegUpdate() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 47 unsigned Opc = MI.getOpcode(); in isLoadFromStackSlot() local 69 unsigned Opc = MI.getOpcode(); in isStoreToStackSlot() local 87 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local 252 unsigned Opc = 0; in storeRegToStack() local 325 unsigned Opc = 0; in loadRegFromStack() local 406 unsigned Opc; in expandPostRAPseudo() local 605 unsigned Opc = ABI.GetPtrAdduOp(); in adjustStackPtr() local 710 MipsSEInstrInfo::compareOpndSize(unsigned Opc, in compareOpndSize()
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H A D | Mips16InstrInfo.cpp | 73 unsigned Opc = 0; in copyPhysReg() local 115 unsigned Opc = 0; in storeRegToStack() local 133 unsigned Opc = 0; in loadRegFromStack() local 219 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16; in makeFrame() local 249 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? in restoreFrame() local
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H A D | MipsRegisterBankInfo.cpp | 109 static bool isFloatingPointOpcode(unsigned Opc) { in isFloatingPointOpcode() 130 static bool isFloatingPointOpcodeUse(unsigned Opc) { in isFloatingPointOpcodeUse() 143 static bool isFloatingPointOpcodeDef(unsigned Opc) { in isFloatingPointOpcodeDef() 166 static bool isAmbiguous(unsigned Opc) { in isAmbiguous() 433 unsigned Opc = MI.getOpcode(); in getInstrMapping() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CSEMIRBuilder.cpp | 105 void CSEMIRBuilder::profileEverything(unsigned Opc, ArrayRef<DstOp> DstOps, in profileEverything() 167 MachineInstrBuilder CSEMIRBuilder::buildInstr(unsigned Opc, in buildInstr() 236 constexpr unsigned Opc = TargetOpcode::G_CONSTANT; in buildConstant() local 263 constexpr unsigned Opc = TargetOpcode::G_FCONSTANT; in buildFConstant() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 337 unsigned Opc = 0; in X86FastEmitLoad() local 498 unsigned Opc = 0; in X86FastEmitStore() local 669 unsigned Opc = 0; in X86FastEmitStore() local 707 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend() 771 unsigned Opc = 0; in handleConstantAddresses() local 2147 unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(*RC)/8); in X86FastEmitCMoveSelect() local 2260 const uint16_t *Opc = nullptr; in X86FastEmitSSESelect() local 2283 unsigned Opc; in X86FastEmitPseudoSelect() local 2497 unsigned Opc = in X86SelectFPExt() local 2511 unsigned Opc = in X86SelectFPTrunc() local [all …]
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H A D | X86InstrInfo.cpp | 1190 unsigned Opc, bool AllowSP, Register &NewSrc, in classifyLEAReg() 1431 unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local 1468 unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r : in convertToThreeAddress() local 1490 unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r in convertToThreeAddress() local 1522 unsigned Opc; in convertToThreeAddress() local 1575 unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local 1616 unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local 1680 unsigned Opc; in convertToThreeAddress() local 1756 unsigned Opc; in convertToThreeAddress() local 1845 unsigned Opc = MI.getOpcode(); in getFMA3OpcodeToCommuteOperands() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCCTRLoops.cpp | 118 unsigned Opc = I->getOpcode(); in verifyCTRBranch() local 178 unsigned Opc = MII->getOpcode(); in runOnMachineFunction() local
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H A D | PPCPreEmitPeephole.cpp | 127 unsigned Opc = BBI->getOpcode(); in removeRedundantLIs() local 370 unsigned Opc = BBI.getOpcode(); in removeAccPrimeUnprime() local 432 unsigned Opc = MI.getOpcode(); in runOnMachineFunction() local
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | CSEConfigBase.h | 23 virtual bool shouldCSEOpc(unsigned Opc) { return false; } in shouldCSEOpc()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kFrameLowering.cpp | 358 unsigned Opc = M68k::MOV32ri; in emitSPUpdate() local 394 unsigned Opc = PI->getOpcode(); in mergeSPUpdates() local 429 unsigned Opc = IsSub ? M68k::SUB32ri : M68k::ADD32ri; in BuildStackAdjustment() local 671 static bool isTailCallOpcode(unsigned Opc) { in isTailCallOpcode() 715 unsigned Opc = PI->getOpcode(); in emitEpilogue() local 746 unsigned Opc = M68k::LEA32p; in emitEpilogue() local 752 unsigned Opc = (M68k::MOV32rr); in emitEpilogue() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | TruncInstCombine.cpp | 50 unsigned Opc = I->getOpcode(); in getRelevantOperands() local 114 unsigned Opc = I->getOpcode(); in buildTruncExpressionDag() local 320 unsigned Opc = I->getOpcode(); in ReduceExpressionDag() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.cpp | 145 const MIMGBaseOpcodeInfo *getMIMGBaseOpcode(unsigned Opc) { in getMIMGBaseOpcode() 150 int getMaskedMIMGOp(unsigned Opc, unsigned NewChannels) { in getMaskedMIMGOp() 229 int getMTBUFBaseOpcode(unsigned Opc) { in getMTBUFBaseOpcode() 239 int getMTBUFElements(unsigned Opc) { in getMTBUFElements() 244 bool getMTBUFHasVAddr(unsigned Opc) { in getMTBUFHasVAddr() 249 bool getMTBUFHasSrsrc(unsigned Opc) { in getMTBUFHasSrsrc() 254 bool getMTBUFHasSoffset(unsigned Opc) { in getMTBUFHasSoffset() 259 int getMUBUFBaseOpcode(unsigned Opc) { in getMUBUFBaseOpcode() 269 int getMUBUFElements(unsigned Opc) { in getMUBUFElements() 274 bool getMUBUFHasVAddr(unsigned Opc) { in getMUBUFHasVAddr() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMatInt.h | 20 unsigned Opc; member
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