/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsRegisterBankInfo.h | 75 bool isAmbiguous_64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_64() 81 bool isAmbiguous_32(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32() 87 bool isAmbiguous_32or64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32or64() 94 unsigned OpSize) const { in isAmbiguousWithMergeOrUnmerge_64() 100 bool isFloatingPoint_32or64(InstType InstTy, unsigned OpSize) const { in isFloatingPoint_32or64() 106 bool isFloatingPoint_64(InstType InstTy, unsigned OpSize) const { in isFloatingPoint_64() 112 bool isInteger_32(InstType InstTy, unsigned OpSize) const { in isInteger_32()
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/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
H A D | X86RecognizableInstr.cpp | 372 uint8_t OpSize)) { in handleOperand() 858 uint8_t OpSize) { in typeFromString() 997 uint8_t OpSize) { in immediateEncodingFromString() 1035 uint8_t OpSize) { in rmRegisterEncodingFromString() 1075 uint8_t OpSize) { in roRegisterEncodingFromString() 1123 uint8_t OpSize) { in vvvvRegisterEncodingFromString() 1155 uint8_t OpSize) { in writemaskRegisterEncodingFromString() 1169 uint8_t OpSize) { in memoryEncodingFromString() 1209 uint8_t OpSize) { in relocationEncodingFromString() 1258 uint8_t OpSize) { in opcodeModifierEncodingFromString()
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H A D | X86RecognizableInstr.h | 177 uint8_t OpSize; variable
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMLegalizerInfo.cpp | 399 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in legalizeCustom() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 456 unsigned OpSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in computeKnownBitsImpl() local
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H A D | MachineIRBuilder.cpp | 558 unsigned OpSize = OpTy.getSizeInBits(); in buildSequence() local
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H A D | LegalizerHelper.cpp | 4899 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); in narrowScalarExtract() local 4968 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); in narrowScalarInsert() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64RegisterBankInfo.cpp | 664 SmallVector<unsigned, 4> OpSize(NumOperands); in getInstrMapping() local
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H A D | AArch64InstructionSelector.cpp | 665 unsigned OpSize) { in selectBinaryOp() 736 unsigned OpSize) { in selectLoadStoreUIOp() 2754 const unsigned OpSize = Ty.getSizeInBits(); in select() local 4284 unsigned OpSize = Ty.getSizeInBits(); in emitFPCompare() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/ |
H A D | Metadata.cpp | 495 size_t OpSize = NumOps * sizeof(MDOperand); in operator new() local 510 size_t OpSize = N->NumOperands * sizeof(MDOperand); in operator delete() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/ |
H A D | DWARFEmitter.cpp | 836 if (Expected<uint64_t> OpSize = in writeListEntry() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | TargetInstrInfo.cpp | 584 int64_t OpSize = MFI.getObjectSize(FI); in foldMemoryOperand() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 850 unsigned OpSize = OpTy.getSizeInBits(); in executeInWaterfallLoop() local 4025 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping() local
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H A D | SIISelLowering.cpp | 3102 unsigned OpSize = Flags.isByVal() ? in LowerCall() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 788 unsigned OpSize = DL.getTypeSizeInBits(Op0->getType()); in SymbolicallyEvaluateBinop() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 681 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8; in LowerCall() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 4971 uint32_t OpSize = (Arg.getValueSizeInBits() + 7) / 8; in CalculateTailCallArgDest() local 12968 auto OpSize = N->getOperand(0).getValueSizeInBits(); in ConvertSETCCToSubtract() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 3166 auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx); in isInlineConstant() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 5775 unsigned OpSize; in LowerCall() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 4274 uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8; in LowerCall() local 48240 unsigned OpSize = OpVT.getSizeInBits(); in combineVectorSizedSetCCEquality() local
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