Searched defs:OpRC (Results 1 – 9 of 9) sorted by relevance
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | BreakFalseDeps.cpp | 137 const TargetRegisterClass *OpRC = in pickBestRegisterForUndef() local
|
| H A D | RegAllocFast.cpp | 1273 const TargetRegisterClass *OpRC = MRI->getRegClass(Reg); addRegClassDefCounts() local
|
| H A D | MachineInstr.cpp | 1014 const TargetRegisterClass *OpRC = getRegClassConstraint(OpIdx, TII, TRI); getRegClassConstraintEffect() local
|
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 338 OpRC = TII->getRegClass(*II, IIOpNum, TRI, *MF); in AddRegisterOperand() local
417 const TargetRegisterClass *OpRC = AddOperand() local
[all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 1653 auto *OpRC = MRI->getRegClass(OpReg); hardenLoadAddr() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1802 const TargetRegisterClass *OpRC = tryFoldRegSequence() local
|
| H A D | SIInstrInfo.cpp | 6221 const TargetRegisterClass *OpRC = RI.getSubClassWithSubReg( legalizeGenericOperand() local
6587 const TargetRegisterClass *OpRC = legalizeOperands() local
6649 const TargetRegisterClass *OpRC = MRI.getRegClass(Op.getReg()); legalizeOperands() local
8516 const TargetRegisterClass *OpRC = findUsedSGPR() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 117 const TargetRegisterClass *OpRC = TII.getRegClass(II, OpIdx, &TRI, MF); in constrainOperandRegClass() local
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 1911 auto *OpRC = HII.getRegClass(HII.get(Opc), OpNum, &HRI, MF); in validateReg() local
|