Searched defs:OpLHS (Results 1 – 7 of 7) sorted by relevance
| /llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | GuardWidening.cpp | 836 Value *OpLHS; parseRangeChecks() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4852 tryReassocBinOp(unsigned Opc,Register DstReg,Register OpLHS,Register OpRHS,BuildFnTy & MatchInfo) tryReassocBinOp() argument
6433 Register X, Y, OpLHS, OpRHS; matchRedundantBinOpInEquality() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4162 SDValue OpLHS = Op.getOperand(0); lowerADDSUBO_CARRY() local
12529 SDValue OpLHS = GeneratePerfectShuffle( GeneratePerfectShuffle() local
12574 SDValue OpLHS, OpRHS; GeneratePerfectShuffle() local
19876 SDValue OpLHS = Op.getOperand(0); getCSETCondCode() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12408 SDValue OpLHS = Other.getOperand(0), OpRHS = Other.getOperand(1); visitVSELECT() local
12460 SDValue OpLHS = Other.getOperand(0).getOperand(0); visitVSELECT() local
12470 SDValue OpLHS = Other.getOperand(0), OpRHS = Other.getOperand(1); visitVSELECT() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8506 SDValue OpLHS, OpRHS; GeneratePerfectShuffle() local
8576 SDValue OpLHS = DAG.getNode(ARMISD::VREV64, DL, VT, Op.getOperand(0)); LowerReverse_VECTOR_SHUFFLE() local
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9780 SDValue OpLHS, OpRHS; GeneratePerfectShuffle() local
[all...] |
| /llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 9393 Value *OpLHS; computeShiftCompareExitLimit() local
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