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Searched defs:OpIdx (Results 1 – 25 of 89) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp212 AArch64MCCodeEmitter::getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, in getLdStUImm12OpValue()
233 AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, in getAdrLabelOpValue()
259 AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, in getAddSubImmOpValue()
296 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getCondBranchTargetOpValue()
317 AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, in getLoadLiteralOpValue()
337 AArch64MCCodeEmitter::getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, in getMemExtendOpValue()
346 AArch64MCCodeEmitter::getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, in getMoveWideImmOpValue()
366 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getTestBranchTargetOpValue()
387 AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
415 AArch64MCCodeEmitter::getVecShifterOpValue(const MCInst &MI, unsigned OpIdx, in getVecShifterOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DInstructionSelectorImpl.h106 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
211 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
269 int64_t OpIdx = MatcherOpcode == GIM_CheckImmOperandPredicate in executeMatchTable() local
531 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
580 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
597 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
628 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
642 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
662 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
686 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp231 uint32_t getLdStmModeOpValue(const MCInst &MI, unsigned OpIdx, in getLdStmModeOpValue()
591 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, in EncodeAddrModeOpValues()
620 static uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
658 getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBLTargetOpValue()
671 getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBLXTargetOpValue()
683 getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBRTargetOpValue()
695 getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBCCTargetOpValue()
707 getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbCBTargetOpValue()
736 getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
750 getARMBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getARMBranchTargetOpValue()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DMIRFormatter.h42 Optional<unsigned> OpIdx, int64_t Imm) const { in printImm()
48 virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, in parseImmMnemonic()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DBreakFalseDeps.cpp107 bool BreakFalseDeps::pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx, in pickBestRegisterForUndef()
172 bool BreakFalseDeps::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx, in shouldBreakDependence()
245 unsigned OpIdx = UndefReads.back().second; in processUndefReads() local
H A DMachineInstr.cpp810 int MachineInstr::findInlineAsmFlagIdx(unsigned OpIdx, in findInlineAsmFlagIdx()
880 MachineInstr::getRegClassConstraint(unsigned OpIdx, in getRegClassConstraint()
937 unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl()
949 unsigned OpIdx, const TargetRegisterClass *CurRC, in getRegClassConstraintEffect()
1515 LLT MachineInstr::getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, in getTypeToPrint()
1609 auto getTiedOperandIdx = [&](unsigned OpIdx) { in print()
1685 const unsigned OpIdx = InlineAsm::MIOp_AsmString; in print() local
1923 unsigned OpIdx = DeadOps.back(); in addRegisterKilled() local
1988 unsigned OpIdx = DeadOps.back(); in addRegisterDead() local
2213 unsigned OpIdx = MI.getDebugOperandIndex(Op); in computeExprForSpill() local
H A DTargetInstrInfo.cpp565 for (unsigned OpIdx : Ops) in foldMemoryOperand() local
583 for (unsigned OpIdx : Ops) { in foldMemoryOperand() local
658 for (unsigned OpIdx : Ops) in foldMemoryOperand() local
822 unsigned OpIdx[4][4] = { in reassociateOps() local
1295 for (unsigned OpIdx = 1, EndOpIdx = MI.getNumOperands(); OpIdx != EndOpIdx; in getRegSequenceInputs() local
1365 const MachineInstr &MI, const MachineOperand &Op, unsigned OpIdx, in createMIROperandComment()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DRegisterBankInfo.cpp113 const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, in getRegBankFromConstraints()
183 for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx; in getInstrMappingImpl() local
442 for (unsigned OpIdx = 0, in applyDefaultMapping() local
641 for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) { in print() local
661 RegisterBankInfo::OperandsMapper::getVRegsMem(unsigned OpIdx) { in getVRegsMem()
697 void RegisterBankInfo::OperandsMapper::createVRegs(unsigned OpIdx) { in createVRegs()
717 void RegisterBankInfo::OperandsMapper::setVRegs(unsigned OpIdx, in setVRegs()
732 RegisterBankInfo::OperandsMapper::getVRegs(unsigned OpIdx, in getVRegs()
H A DRegBankSelect.cpp467 for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands(); in computeMapping() local
594 unsigned OpIdx = RepairPt.getOpIdx(); in applyMapping() local
754 MachineInstr &MI, unsigned OpIdx, const TargetRegisterInfo &TRI, Pass &P, in RepairingPlacement()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/GlobalISel/
H A DGIMatchTree.h28 Optional<unsigned> OpIdx; variable
92 void bindOperandVariable(StringRef Name, unsigned InstrID, unsigned OpIdx) { in bindOperandVariable()
226 unsigned OpIdx; variable
229 GIMatchTreeOperandInfo(const GIMatchDagInstr *InstrNode, unsigned OpIdx) in GIMatchTreeOperandInfo()
588 unsigned OpIdx; variable
596 GIMatchTreeVRegDefPartitioner(unsigned InstrID, unsigned OpIdx) in GIMatchTreeVRegDefPartitioner()
H A DGIMatchTree.cpp150 unsigned OpIdx) { in declareOperand()
191 unsigned OpIdx) { in addPartitionersForOperand()
583 for (unsigned OpIdx : ReferencedOperands.set_bits()) { in applyForPartition() local
587 for (unsigned OpIdx : ReferencedOperands.set_bits()) { in applyForPartition() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/
H A DMCInstPrinter.cpp63 const MCRegisterInfo &MRI, unsigned &OpIdx, in matchAliasCondition()
147 unsigned OpIdx = 0; in matchAliasPatterns() local
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DGlobalISelEmitter.cpp1130 unsigned OpIdx; member in __anon332dbd1e0111::PredicateMatcher
1133 PredicateMatcher(PredicateKind Kind, unsigned InsnVarID, unsigned OpIdx = ~0) in PredicateMatcher()
1182 unsigned OpIdx) in OperandPredicateMatcher()
1204 SameOperandMatcher(unsigned InsnVarID, unsigned OpIdx, StringRef MatchingName) in SameOperandMatcher()
1237 LLTOperandMatcher(unsigned InsnVarID, unsigned OpIdx, const LLTCodeGen &Ty) in LLTOperandMatcher()
1289 PointerToAnyOperandMatcher(unsigned InsnVarID, unsigned OpIdx, in PointerToAnyOperandMatcher()
1322 RecordNamedOperandMatcher(unsigned InsnVarID, unsigned OpIdx, in RecordNamedOperandMatcher()
1358 ComplexPatternOperandMatcher(unsigned InsnVarID, unsigned OpIdx, in ComplexPatternOperandMatcher()
1390 RegisterBankOperandMatcher(unsigned InsnVarID, unsigned OpIdx, in RegisterBankOperandMatcher()
1417 MBBOperandMatcher(unsigned InsnVarID, unsigned OpIdx) in MBBOperandMatcher()
[all …]
H A DCodeGenInstruction.cpp158 unsigned OpIdx; in getOperandNamed() local
199 unsigned OpIdx = getOperandNamed(OpName); in ParseOperandName() local
H A DCodeEmitterGen.cpp105 unsigned OpIdx; in AddCodeToMergeInOperand() local
301 unsigned OpIdx; in getInstructionCaseForEncoding() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP() local
574 int OpIdx = mapRegToGPRIndex(Op.getReg()); in runOnMachineFunction() local
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/PowerPC/
H A DTarget.cpp17 static void setMemOp(InstructionTemplate &IT, int OpIdx, in setMemOp()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/Mips/
H A DTarget.cpp42 static void setMemOp(InstructionTemplate &IT, int OpIdx, in setMemOp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXPrologEpilogPass.cpp84 unsigned OpIdx = MI.getDebugOperandIndex(&Op); in runOnMachineFunction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h773 int OpIdx = MI.getOperandNo(&UseMO); in isInlineConstant() local
783 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx) const { in isInlineConstant()
788 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx, in isInlineConstant()
815 bool isLiteralConstant(const MachineInstr &MI, int OpIdx) const { in isLiteralConstant()
H A DR600ExpandSpecialInstrs.cpp63 int OpIdx = TII->getOperandIdx(*OldMI, Op); in SetFlagInNewMI() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp215 int OpIdx = findFirstVPTPredOperandIdx(*Iter); in CreateVPTBlock() local
H A DARMExpandPseudoInsts.cpp539 unsigned OpIdx = 0; in ExpandVLD() local
650 unsigned OpIdx = 0; in ExpandVST() local
727 unsigned OpIdx = 0; in ExpandLaneOp() local
811 unsigned OpIdx = 0; in ExpandVTBL() local
2508 unsigned OpIdx = 0; in ExpandMI() local
2539 unsigned OpIdx = 0; in ExpandMI() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFAdjustOpt.cpp55 uint32_t OpIdx; member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZHazardRecognizer.cpp122 for (unsigned OpIdx = 0; OpIdx < MID.getNumOperands(); OpIdx++) { in has4RegOps() local

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