| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 227 AArch64MCCodeEmitter::getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, in getLdStUImm12OpValue()
248 AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, in getAdrLabelOpValue()
274 AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, in getAddSubImmOpValue()
302 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getCondBranchTargetOpValue()
323 AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, in getLoadLiteralOpValue()
343 AArch64MCCodeEmitter::getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, in getMemExtendOpValue()
352 AArch64MCCodeEmitter::getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, in getMoveWideImmOpValue()
372 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getTestBranchTargetOpValue()
393 AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
421 AArch64MCCodeEmitter::getVecShifterOpValue(const MCInst &MI, unsigned OpIdx, in getVecShifterOpValue()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 191 uint32_t getLdStmModeOpValue(const MCInst &MI, unsigned OpIdx, in getLdStmModeOpValue()
560 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, in EncodeAddrModeOpValues()
589 static uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
627 getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBLTargetOpValue()
640 getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBLXTargetOpValue()
652 getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBRTargetOpValue()
664 getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBCCTargetOpValue()
676 getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbCBTargetOpValue()
705 getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
719 getARMBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getARMBranchTargetOpValue()
[all …]
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Analysis/ |
| H A D | ConstantsScanner.h | 28 unsigned OpIdx; // Operand index variable
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 391 unsigned OpIdx = 0; in ExpandVLD() local
456 unsigned OpIdx = 0; in ExpandVST() local
510 unsigned OpIdx = 0; in ExpandLaneOp() local
593 unsigned OpIdx = 0; in ExpandVTBL() local
1088 unsigned OpIdx = 0; in ExpandMI() local
1119 unsigned OpIdx = 0; in ExpandMI() local
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64AddressTypePromotion.cpp | 206 static bool shouldSExtOperand(const Instruction *Inst, int OpIdx) { in shouldSExtOperand()
311 for (int OpIdx = 0, EndOpIdx = Inst->getNumOperands(); OpIdx != EndOpIdx; in propagateSignExtension() local
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| H A D | AArch64PromoteConstant.cpp | 240 unsigned OpIdx) { in shouldConvertUse()
565 for (unsigned OpIdx = 0, EndOpIdx = MI.getNumOperands(); in runOnFunction() local
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| H A D | AArch64InstrInfo.cpp | 715 for (unsigned OpIdx = 0, EndIdx = Instr->getNumOperands(); OpIdx < EndIdx; in UpdateOperandRegClass() local
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| /minix3/external/bsd/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeEmitterGen.cpp | 87 unsigned OpIdx; in AddCodeToMergeInOperand() local
193 unsigned OpIdx; in getInstructionCase() local
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| H A D | CodeGenInstruction.cpp | 137 unsigned OpIdx; in getOperandNamed() local
173 unsigned OpIdx = getOperandNamed(OpName); in ParseOperandName() local
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| H A D | FixedLenDecoderEmitter.cpp | 1726 unsigned OpIdx; in populateInstruction() local
1757 unsigned OpIdx; in populateInstruction() local
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| H A D | AsmWriterEmitter.cpp | 644 void addOperand(StringRef Op, int OpIdx, int PrintMethodIdx = -1) { in addOperand()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 1012 int MachineInstr::findInlineAsmFlagIdx(unsigned OpIdx, in findInlineAsmFlagIdx()
1041 MachineInstr::getRegClassConstraint(unsigned OpIdx, in getRegClassConstraint()
1096 unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl()
1108 unsigned OpIdx, const TargetRegisterClass *CurRC, in getRegClassConstraintEffect()
1806 unsigned OpIdx = DeadOps.back(); in addRegisterKilled() local
1871 unsigned OpIdx = DeadOps.back(); in addRegisterDead() local
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| H A D | ExecutionDepsFix.cpp | 475 bool ExeDepsFix::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx, in shouldBreakDependence()
561 unsigned OpIdx = UndefReads.back().second; in processUndefReads() local
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| H A D | TargetInstrInfo.cpp | 895 for (unsigned OpIdx = 1, EndOpIdx = MI.getNumOperands(); OpIdx != EndOpIdx; in getRegSequenceInputs() local
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| H A D | PeepholeOptimizer.cpp | 1228 for (unsigned OpIdx = DefIdx + 1, EndOpIdx = SrcIdx; OpIdx != EndOpIdx; in getNextSourceFromBitcast() local
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| H A D | MachineLICM.cpp | 785 unsigned Reg, unsigned OpIdx, in getRegisterClassIDAndCost()
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| H A D | CodeGenPrepare.cpp | 1997 static bool shouldExtOperand(const Instruction *Inst, int OpIdx) { in shouldExtOperand()
2264 for (int OpIdx = 0, EndOpIdx = ExtOpnd->getNumOperands(); OpIdx != EndOpIdx; in promoteOperandForOther() local
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 49 int OpIdx; member
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | R600ExpandSpecialInstrs.cpp | 61 int OpIdx = TII->getOperandIdx(*OldMI, Op); in SetFlagInNewMI() local
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| H A D | SIInstrInfo.cpp | 1207 for (int OpIdx : OpIndices) { in verifyInstruction() local
1450 bool SIInstrInfo::isOperandLegal(const MachineInstr *MI, unsigned OpIdx, in isOperandLegal()
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| H A D | AMDGPUISelDAGToDAG.cpp | 160 unsigned OpIdx = Desc.getNumDefs() + OpNo; in getOperandRegClass() local
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| /minix3/external/bsd/llvm/dist/llvm/lib/MC/MCDisassembler/ |
| H A D | Disassembler.cpp | 173 for (unsigned OpIdx = 0, OpIdxEnd = Inst.getNumOperands(); OpIdx != OpIdxEnd; in getItineraryLatency() local
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 638 unsigned OpIdx, SDep& dep) const{ in computeOperandLatency()
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| /minix3/external/bsd/llvm/dist/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldChecker.cpp | 254 unsigned OpIdx = OpIdxExpr.getValue(); in evalDecodeOperand() local
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| /minix3/external/bsd/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 617 for (unsigned OpIdx = 0; OpIdx < 2; ++OpIdx) { // Visit operands. in LinearizeExprTree() local
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