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Searched defs:Op2 (Results 1 – 25 of 96) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp240 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
258 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
346 unsigned Op1, Op2; in Decode2RInstruction() local
359 unsigned Op1, Op2; in Decode2RImmInstruction() local
372 unsigned Op1, Op2; in DecodeR2RInstruction() local
385 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
399 unsigned Op1, Op2; in DecodeRUSInstruction() local
412 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
425 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
510 unsigned Op1, Op2; in DecodeL2RInstruction() local
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSelectionDAGTargetInfo.h53 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy()
69 SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, in EmitTargetCodeForMemmove()
82 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemset()
94 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp()
131 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCCodeEmitter.cpp142 const MCOperand Op2 = Inst.getOperand(2); in adjustPqBits() local
190 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRiMemoryOpValue() local
222 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRrMemoryOpValue() local
261 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getSplsOpValue() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.h25 uint64_t Op2; member
/netbsd-src/sys/external/bsd/acpica/dist/compiler/
H A Dasltree.c543 ACPI_PARSE_OBJECT *Op2) in TrLinkPeerOp()
680 ACPI_PARSE_OBJECT *Op2) in TrLinkChildOp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DDFAPacketizer.cpp283 const MachineMemOperand &Op2, in alias()
308 for (const MachineMemOperand *Op2 : MI2.memoperands()) in alias() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp142 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
160 uint32_t Op2 = Bits & 0x7; in genericRegisterString() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiMemAluCombiner.cpp170 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { in isSameOperand()
294 MachineOperand &Op2 = AluIter->getOperand(2); in isSuitableAluInstr() local
/netbsd-src/sys/arch/arm/samsung/
H A Dsmc.h63 #define SMC_REG_ID_CP15(CRn, Op1, CRm, Op2) \ argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblySelectionDAGInfo.cpp37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove()
H A DWebAssemblyPeephole.cpp164 const auto &Op2 = MI.getOperand(2); in runOnMachineFunction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp173 MCOperand Op2 = MI.getOperand(MemOpStartIndex + 1); in getMemoryOpValue() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp345 const MachineOperand &Op2 = MI->getOperand(2); in profit() local
728 MachineOperand &Op2 = MI->getOperand(2); in splitCombine() local
780 MachineOperand &Op2 = MI->getOperand(2); in splitShift() local
904 MachineOperand &Op2 = MI->getOperand(2); in splitAslOr() local
H A DHexagonRegisterInfo.cpp308 const auto &Op2 = BI.getOperand(2); in eliminateFrameIndex() local
H A DHexagonNewValueJump.cpp251 const MachineOperand &Op2 = MI.getOperand(2); in canCompareBeNewValueJump() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.cpp153 const MCOperand &Op2 = MI->getOperand(opNum + 1); in printMemOperand() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp71 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps() local
H A DPPCExpandISEL.cpp87 bool useSameRegister(const MachineOperand &Op1, const MachineOperand &Op2) { in useSameRegister()
H A DPPCBranchCoalescing.cpp342 const MachineOperand &Op2 = OpList2[i]; in identicalOperands() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrBuilder.h107 const MachineOperand &Op2 = MI->getOperand(Operand + 2); in getAddressFromInstr() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp95 const MachineOperand *Op2 = &Inst->getOperand(2); in checkADDrr() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DProfileSummary.cpp167 ConstantAsMetadata *Op2 = in getSummaryFromMD() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIPreEmitPeephole.cpp108 MachineOperand &Op2 = A->getOperand(2); in optimizeVccBranch() local
H A DSIOptimizeExecMaskingPreRA.cpp156 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1); in optimizeVcndVcmpPair() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp3115 SDValue Op2 = getValue(I.getOperand(1)); in visitBinary() local
3123 SDValue Op2 = getValue(I.getOperand(1)); in visitShift() local
3176 SDValue Op2 = getValue(I.getOperand(1)); in visitSDiv() local
3192 SDValue Op2 = getValue(I.getOperand(1)); in visitICmp() local
3219 SDValue Op2 = getValue(I.getOperand(1)); in visitFCmp() local
5827 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
5869 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
5884 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
6419 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
6425 SDValue Op2 = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
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