| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 303 Register OffsetReg = MRI.createVirtualRegister(PtrRC); emitPrologue() local
355 Register OffsetReg = MRI.createVirtualRegister(PtrRC); emitEpilogue() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 1097 R600::AR_X, OffsetReg); in buildIndirectWrite() argument
1014 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); expandPostRAPseudo() local
1028 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); expandPostRAPseudo() local
1129 buildIndirectRead(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg,unsigned AddrChan) const buildIndirectRead() argument
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| H A D | AMDGPUCallLowering.cpp | 226 auto OffsetReg = MIRBuilder.buildConstant(S32, Offset); getStackAddress() local
409 auto OffsetReg = B.buildConstant(LLT::scalar(64), Offset); lowerParameterPtr() local
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| H A D | AMDGPUInstructionSelector.cpp | 848 Register OffsetReg = MI.getOperand(2).getReg(); selectG_SBFX_UBFX() local
4203 if (Register OffsetReg = selectSmrdOffset() local
4249 if (Register OffsetReg = matchZeroExtendFromS32(*MRI, GEPI.SgprParts[1])) { selectSmrdOffset() local
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| H A D | SIRegisterInfo.cpp | 851 Register OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); materializeFrameBaseRegister() local
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| H A D | AMDGPURegisterBankInfo.cpp | 1464 Register OffsetReg = MI.getOperand(FirstOpnd + 1).getReg(); applyMappingBFE() local
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| /llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 84 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress() local
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| /llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 101 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); getStackAddress() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 104 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); getStackAddress() local
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| H A D | Thumb2InstrInfo.cpp | 645 Register OffsetReg = MI.getOperand(FrameRegIdx + 1).getReg(); rewriteT2FrameIndex() local
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| H A D | Thumb2SizeReduction.cpp | 565 unsigned OffsetReg = 0; ReduceLoadStore() local
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| /llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 130 unsigned OffsetReg; global() member
624 unsigned OffsetReg = Op->getReg(); MorphToMemRegReg() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 865 Register OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
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| H A D | MipsCallLowering.cpp | 239 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
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| H A D | MipsISelLowering.cpp | 2592 unsigned OffsetReg = ABI.IsN64() ? Mips::V1_64 : Mips::V1; lowerEH_RETURN() local
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| /llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 80 auto OffsetReg = MIRBuilder.buildConstant(sXLen, Offset); getStackAddress() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 170 Register OffsetReg = MI.getOperand(2).getReg(); canRemoveAddasl() local
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| H A D | HexagonISelLowering.cpp | 3330 unsigned OffsetReg = Hexagon::R28; LowerEH_RETURN() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 271 auto OffsetReg = MIRBuilder.buildConstant(s64, Offset); getStackAddress() local
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| H A D | AArch64InstructionSelector.cpp | 6649 Register OffsetReg = DefMI->getOperand(2).getReg(); selectPtrAuthGlobalValue() local
6931 Register OffsetReg = OffsetInst->getOperand(1).getReg(); selectExtendedSHL() local
[all...] |
| /llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 241 unsigned OffsetReg; global() member
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 2899 Register OffsetReg = AddrI.getOperand(2).getReg(); canFoldIntoAddrMode() local
3466 Register OffsetReg = AM.ScaledReg; emitLdStWithAddr() local
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| H A D | AArch64FastISel.cpp | 97 unsigned OffsetReg = 0; global() member in __anonf5444d350111::AArch64FastISel::Address
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 34632 unsigned OffsetReg = 0; EmitVAARGWithCustomInserter() local
[all...] |