| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 227 const MCOperand &OffsetOp, in printMemoryImmediateOffset()
241 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local
256 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local
277 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemSplsOperand() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 178 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local
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| H A D | AVRMCCodeEmitter.cpp | 141 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 73 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 123 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 164 const MachineOperand &OffsetOp = MI.getOperand(3); canRemoveAddasl() local
435 MachineOperand OffsetOp = MI->getOperand(getOffsetOpPosition(MI)); processAddUses() local
497 MachineOperand &OffsetOp = UseMI->getOperand(getOffsetOpPosition(UseMI)); updateAddUses() local
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| H A D | HexagonInstrInfo.cpp | 2049 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); getIncrementValue() local
3281 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); getBaseAndOffset() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1503 const MachineOperand &OffsetOp = MI->getOperand(2); verifyPreISelGenericInstruction() local
1525 const MachineOperand &OffsetOp = MI->getOperand(3); verifyPreISelGenericInstruction() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 890 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); resolveFrameIndex() local
2279 MachineOperand *OffsetOp = eliminateFrameIndex() local
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| H A D | SIInstrInfo.cpp | 370 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3757 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst() local
3884 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2248 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); emitEpilogue() local
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| H A D | AArch64ISelDAGToDAG.cpp | 1533 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); tryIndexedLoad() local
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| H A D | AArch64ISelLowering.cpp | 21625 SDValue OffsetOp = Add.getOperand(1); foldIndexIntoBase() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 8467 InferPointerInfo(const MachinePointerInfo & Info,SelectionDAG & DAG,SDValue Ptr,SDValue OffsetOp) InferPointerInfo() argument
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| H A D | DAGCombiner.cpp | 8758 auto OffsetOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); calculateByteProvider() local
[all...] |