| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 104 int64_t OffsetA = 0, OffsetB = 0; in areMemAccessesTriviallyDisjoint() local
|
| /llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoadStoreVectorizer.cpp | 1479 APInt OffsetA(OrigBitWidth, 0); getConstantOffset() local
|
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 2283 int OffsetA = MMOa->getOffset(), OffsetB = MMOb->getOffset(); areMemAccessesTriviallyDisjoint() local
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| /llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | MetadataLoader.cpp | 1847 unsigned OffsetA = 0; parseOneMetadata() local
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 1343 int64_t OffsetA = MMOa->getOffset(); MemOperandsHaveAlias() local
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| /llvm-project/llvm/lib/Analysis/ |
| H A D | LoopAccessAnalysis.cpp | 1583 APInt OffsetA(IdxWidth, 0), OffsetB(IdxWidth, 0); getPointersDiff() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2752 int64_t OffsetA = 0, OffsetB = 0; areMemAccessesTriviallyDisjoint() local
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2026 int OffsetA = isPostIncrement(MIa) ? 0 : OffA.getImm(); areMemAccessesTriviallyDisjoint() local
|
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 5565 int64_t OffsetA = 0, OffsetB = 0; areMemAccessesTriviallyDisjoint() local
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1105 int64_t OffsetA = 0, OffsetB = 0; areMemAccessesTriviallyDisjoint() local
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| H A D | AArch64ISelLowering.cpp | 16654 APInt OffsetA(IdxWidth, 0), OffsetB(IdxWidth, 0); hasNearbyPairedStore() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3690 offsetsDoNotOverlap(LocationSize WidthA,int OffsetA,LocationSize WidthB,int OffsetB) offsetsDoNotOverlap() argument
|