| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 203 int64_t Offset1 = 0; in getHazardType() local
|
| H A D | ARMBaseInstrInfo.cpp | 1925 int64_t &Offset1, in areLoadsFromSameBasePtr()
2006 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1493 int64_t Offset1 = Const->getSExtValue(); in doPeepholeLoadStoreADDI() local
1508 int64_t Offset1 = GA->getOffset(); in doPeepholeLoadStoreADDI() local
1518 int64_t Offset1 = CP->getOffset(); in doPeepholeLoadStoreADDI() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | ConstraintElimination.cpp | 131 int64_t Offset1 = 0; in getConstraint() local
|
| H A D | SeparateConstOffsetFromGEP.cpp | 1351 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-profgen/ |
| H A D | ProfiledBinary.cpp | 120 uint64_t Offset1 = virtualAddrToOffset(Address1); in inlineContextEqual() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 360 int64_t Offset1; in apply() local
|
| H A D | HexagonISelLoweringHVX.cpp | 1757 SDValue Offset1 = DAG.getTargetConstant(HwLen, dl, MVT::i32); in LowerHvxMaskedOp() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1297 int64_t &Offset1, in areLoadsFromSameBasePtr()
1311 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 400 int64_t Offset1, Offset2; in ConsecutiveInstr() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 243 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
|
| H A D | DAGCombiner.cpp | 15265 const APInt &Offset1 = cast<ConstantSDNode>(Offset)->getAPIntValue(); in CombineToPreIndexedLoadStore() local
17385 int64_t Offset1 = LoadNodes[1].OffsetFromBase; in tryStoreMergeOfLoads() local
|
| /netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | ContainerModeling.cpp | 973 SymbolRef Offset1, in invalidateIteratorPositions()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1279 unsigned Offset1, in isDSOffset2Legal()
1309 SDValue &Offset0, SDValue &Offset1, in SelectDSReadWrite2()
|
| H A D | SILoadStoreOptimizer.cpp | 1811 uint64_t Offset1 = Src1->getImm(); in processBaseWithConstOffset() local
|
| H A D | SIInstrInfo.cpp | 283 unsigned Offset1 = Offset1Op->getImm(); in getMemOperandsWithOffsetWidth() local
471 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear()
2948 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local
|
| H A D | AMDGPUInstructionSelector.cpp | 1269 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (ShaderType << 2) | in selectDSOrderedIntrinsic() local
3793 int64_t Offset1, in isDSOffset2Legal()
|
| H A D | SIISelLowering.cpp | 6847 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (ShaderType << 2) | in LowerINTRINSIC_W_CHAIN() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3059 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI()
3126 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 6549 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr()
6747 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
|
| H A D | X86ISelLowering.cpp | 7764 bool Offset0 = false, Offset1 = false; in getFauxShuffleMask() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 775 int64_t Offset1, Offset2; in addLoopCarriedDependences() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2827 int64_t Offset1 = 0, Offset2 = 0; in shouldClusterMemOps() local
|
| H A D | PPCISelLowering.cpp | 12751 int64_t Offset1 = 0, Offset2 = 0; in isConsecutiveLSLoc() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 7093 auto Offset1 = getOffsetFromIndex(GEP1, Idx, DL); in isPointerOffset() local
|