| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 133 int NumSubElts = SubVTy->getNumElements(); getExtractSubvectorOverhead() local
161 int NumSubElts = SubVTy->getNumElements(); getInsertSubvectorOverhead() local
982 int NumSubElts; improveShuffleKindFromMask() local
1392 unsigned NumSubElts = NumElts / Factor; global() variable
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 871 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); SimplifyMultipleUseDemandedBits() local
1240 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); SimplifyDemandedBits() local
1311 unsigned NumSubElts = SubVT.getVectorNumElements(); SimplifyDemandedBits() local
1407 unsigned NumSubElts = SimplifyDemandedBits() local
3223 unsigned NumSubElts = SubVT.getVectorNumElements(); SimplifyDemandedVectorElts() local
3261 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); SimplifyDemandedVectorElts() local
9786 unsigned NumSubElts = SubEC.getKnownMinValue(); clampDynamicVectorIndex() local
[all...] |
| H A D | SelectionDAG.cpp | 3204 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); computeKnownBits() local
4755 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); ComputeNumSignBits() local
11966 __anonf8222bf91c02(SDValue Op, unsigned NumSubElts) matchBinOpReduction() argument
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| H A D | DAGCombiner.cpp | 25585 int NumSubElts = SubVT.getVectorNumElements(); visitVECTOR_SHUFFLE() local
26557 int NumSubElts = NumElts * Split; XformToShuffleWithZero() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 1505 int NumSubElts = SubLT.second.getVectorNumElements(); getShuffleCost() local
1552 int NumSubElts = SubLT.second.getVectorNumElements(); getShuffleCost() local
[all...] |
| H A D | X86InstCombineIntrinsic.cpp | 265 for (unsigned i = 0, NumSubElts = 64 / BitWidth; i != NumSubElts; ++i) { simplifyX86immShift() local
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| H A D | X86ISelLowering.cpp | 4112 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; SplitOpsAndApply() local
4798 unsigned NumSubElts = SubVecSizeInBits / CstEltSizeInBits; getTargetConstantBitsFromNode() local
4867 unsigned NumSubElts = VT.getVectorNumElements(); getTargetConstantBitsFromNode() local
5586 int NumSubElts = V.getOperand(1).getValueType().getVectorNumElements(); getTargetShuffleAndZeroables() local
5778 unsigned NumSubElts = SubVT.getVectorNumElements(); getFauxShuffleMask() local
6298 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); getShuffleScalarElt() local
6308 unsigned NumSubElts = SubVT.getVectorNumElements(); getShuffleScalarElt() local
11150 unsigned RotateAmt, NumSubElts; matchShuffleAsBitRotate() local
12410 int NumSubElts = (int)VInner.getSimpleValueType().getVectorNumElements(); lowerShuffleAsBroadcast() local
54738 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); combineConcatVectorOps() local
55495 unsigned NumSubElts = VT.getVectorNumElements(); combineEXTRACT_SUBVECTOR() local
[all...] |
| H A D | X86ISelDAGToDAG.cpp | 1071 unsigned NumSubElts = VT.getSizeInBits() / MaxVT.getScalarSizeInBits(); PreprocessISelDAG() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Instructions.cpp | 2342 isInsertSubvectorMask(ArrayRef<int> Mask,int NumSrcElts,int & NumSubElts,int & Index) isInsertSubvectorMask() argument
2682 matchShuffleAsBitRotate(ArrayRef<int> Mask,int NumSubElts) matchShuffleAsBitRotate() argument
2705 isBitRotateMask(ArrayRef<int> Mask,unsigned EltSizeInBits,unsigned MinSubElts,unsigned MaxSubElts,unsigned & NumSubElts,unsigned & RotateAmt) isBitRotateMask() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 1315 int NumSubElts, SubIndex; getInstructionCost() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 3968 int NumSubElts = SubLT.second.getVectorNumElements(); getShuffleCost() local
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| H A D | AArch64ISelLowering.cpp | 18411 unsigned NumSubElts = SubVT.getVectorNumElements(); performInsertSubvectorCombine() local
19330 int NumSubElts = NumElts / 4; isLoadOrMultipleLoads() local
19450 unsigned NumSubElts = NumElts / NumSubLoads; performExtBinopLoadFold() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4393 int NumSubElts, Index; lowerVECTOR_SHUFFLEAsVSlideup() local
4632 unsigned NumSubElts, RotateAmt; lowerVECTOR_SHUFFLEAsRotate() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 6909 int NumSubElts; getShuffleCost() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15655 unsigned NumSubElts = SubVT.getVectorNumElements(); PerformInsertSubvectorCombine() local
|