/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86ShuffleDecode.cpp | 150 unsigned NumLanes = Size / 128; DecodePSHUFMask() local 221 unsigned NumLanes = (NumElts * ScalarBits) / 128; DecodeUNPCKHMask() local 237 unsigned NumLanes = (NumElts * ScalarBits) / 128; DecodeUNPCKLMask() local 267 unsigned NumLanes = NumElts / NumElementsInLane; decodeVSHUF64x2FamilyMask() local 480 unsigned NumLanes = VecSize / 128; DecodeVPERMILPMask() local 502 unsigned NumLanes = VecSize / 128; DecodeVPERMIL2PMask() local [all...] |
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 417 unsigned NumLanes = Size / 4; allocateSGPRSpillToVGPRLane() local 464 unsigned NumLanes = Size / 4; allocateVGPRSpillToAGPR() local
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H A D | AMDGPURegisterBankInfo.cpp | 1964 unsigned NumLanes = DstRegs.size(); foldExtractEltToCmpSelect() local 2065 unsigned NumLanes = InsRegs.size(); foldInsertEltToCmpSelect() local [all...] |
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InterleavedAccess.cpp | 477 unsigned NumLanes = std::max((int)VT.getSizeInBits() / 128, 1); DecodePALIGNRMask() local
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H A D | X86InstCombineIntrinsic.cpp | 450 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128; simplifyX86pack() local 3305 unsigned NumLanes = Ty0->getPrimitiveSizeInBits() / 128; simplifyDemandedVectorEltsIntrinsic() local
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H A D | X86ISelLowering.cpp | 5173 unsigned NumLanes = VT.getSizeInBits() / 128; createPackShuffleMask() local 5193 int NumLanes = VT.getSizeInBits() / 128; getPackDemandedElts() local 5218 int NumLanes = VT.getSizeInBits() / 128; getHorizDemandedElts() local 9461 int NumLanes = NumElts / NumEltsPerLane; isMultiLaneShuffleMask() local 9620 int NumLanes = VT.getSizeInBits() / 128; IsElementEquivalent() local 10599 int NumLanes = VT.getSizeInBits() / 128; matchShuffleAsBlend() local 10874 int NumLanes = VT.getSizeInBits() / 128; lowerShuffleAsUNPCKAndPermute() local 11076 int NumLanes = VT.getSizeInBits() / 128; lowerShuffleAsByteRotateAndPermute() local 11184 int NumLanes = VT.getSizeInBits() / 128; lowerShuffleAsDecomposedShuffleMerge() local 12083 int NumLanes = Bits / 128; lowerShuffleAsZeroOrAnyExtend() local 14786 int NumLanes = VT.getSizeInBits() / 128; lowerShuffleAsLanePermuteAndPermute() local 15093 int NumLanes = VT.getSizeInBits() / 128; lowerShuffleAsLanePermuteAndRepeatedMask() local 15463 int NumLanes = VT.getSizeInBits() / 128; lowerShuffleAsRepeatedMaskAndLanePermute() local 21799 unsigned NumLanes = BitWidth / 128; lowerAddSubToHorizontalOp() local 28499 unsigned NumLanes = VT.getSizeInBits() / 128; LowerMUL() local 39095 unsigned NumLanes = MaskVT.getSizeInBits() / 128; combineX86ShuffleChain() local 39381 int NumLanes = VT0.getSizeInBits() / 128; canonicalizeShuffleMaskWithHorizOp() local 40145 for (int i = 1, NumLanes = VT.getSizeInBits() / 128; i < NumLanes; ++i) getPSHUFShuffleMask() local 48349 unsigned NumLanes = VT.getSizeInBits() / 128; combineVectorPack() local [all...] |
/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlanRecipes.cpp | 633 for (unsigned Lane = 0, NumLanes = State.VF.getKnownMinValue(); execute() local
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H A D | SLPVectorizer.cpp | 1382 int NumLanes; // Total number of lanes (aka vectorization factor). global() member in llvm::slpvectorizer::BoUpSLP::LookAheadHeuristics 1387 LookAheadHeuristics(const TargetLibraryInfo & TLI,const DataLayout & DL,ScalarEvolution & SE,const BoUpSLP & R,int NumLanes,int MaxLevel) LookAheadHeuristics() argument 1756 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; clearUsed() local 2121 unsigned NumLanes = VL.size(); appendOperandsOfVL() local 2263 unsigned NumLanes = getNumLanes(); reorder() local 2987 unsigned NumLanes = Scalars.size(); setOperandsInOrder() local 5995 unsigned NumLanes = TE->Scalars.size(); findExternalStoreUsersReorderIndices() local [all...] |
/llvm-project/clang/utils/TableGen/ |
H A D | NeonEmitter.cpp | 769 unsigned NumLanes; fromTypedefName() local
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/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 2370 size_t NumLanes = Op.getSimpleValueType().getVectorNumElements(); unrollVectorShift() local
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/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 2831 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; upgradeX86IntrinsicCall() local
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/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 15171 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; EmitX86BuiltinExpr() local 15197 unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128; EmitX86BuiltinExpr() local 15301 unsigned NumLanes = Ty->getPrimitiveSizeInBits() == 512 ? 4 : 2; EmitX86BuiltinExpr() local
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 16930 unsigned NumLanes = Op.getValueType().getVectorNumElements(); PerformVCVTCombine() local 17071 unsigned NumLanes = Op.getValueType().getVectorNumElements(); PerformVMulVCTPCombine() local
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