| /llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1253 getVectorTypeBreakdownMVT(MVT VT,MVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT,TargetLoweringBase * TLI) getVectorTypeBreakdownMVT() argument
1641 unsigned NumIntermediates; computeRegisterProperties() local
1708 getVectorTypeBreakdown(LLVMContext & Context,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdown() argument
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1180 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) getVectorTypeBreakdownForCallingConv() argument
1722 unsigned NumIntermediates; getRegisterType() local
1755 unsigned NumIntermediates; global() variable
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 174 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 126 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 357 unsigned NumIntermediates; getCopyFromPartsVector() local
762 unsigned NumIntermediates; getCopyToPartsVector() local
[all...] |
| H A D | SelectionDAG.cpp | 2477 unsigned NumIntermediates; getReducedAlign() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 28419 unsigned NumIntermediates; getRegisterTypeForCallingConv() local
28434 unsigned NumIntermediates; getNumRegistersForCallingConv() local
28441 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 1062 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2357 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
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