Searched defs:NextVA (Results 1 – 7 of 7) sorted by relevance
| /llvm-project/clang/lib/AST/ |
| H A D | StmtIterator.cpp | 37 void StmtIteratorBase::NextVA() { NextVA() function in StmtIteratorBase
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 146 const CCValAssign &NextVA = VAs[1]; assignCustomValue() local
322 const CCValAssign &NextVA = VAs[1]; assignCustomValue() local
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| H A D | ARMFastISel.cpp | 1989 assert(VA.isRegLoc() && NextVA.isRegLoc() && in ProcessCallArgs() local
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| H A D | ARMISelLowering.cpp | 2344 PassF64ArgInRegs(const SDLoc & dl,SelectionDAG & DAG,SDValue Chain,SDValue & Arg,RegsToPassVector & RegsToPass,CCValAssign & VA,CCValAssign & NextVA,SDValue & StackPtr,SmallVectorImpl<SDValue> & MemOpChains,bool IsTailCall,int SPDiff) const PassF64ArgInRegs() argument
4358 GetF64FormalArgument(CCValAssign & VA,CCValAssign & NextVA,SDValue & Root,SelectionDAG & DAG,const SDLoc & dl) const GetF64FormalArgument() argument
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 715 Passv64i1ArgInRegs(const SDLoc & DL,SelectionDAG & DAG,SDValue & Arg,SmallVectorImpl<std::pair<Register,SDValue>> & RegsToPass,CCValAssign & VA,CCValAssign & NextVA,const X86Subtarget & Subtarget) Passv64i1ArgInRegs() argument
1006 getv64i1Argument(CCValAssign & VA,CCValAssign & NextVA,SDValue & Root,SelectionDAG & DAG,const SDLoc & DL,const X86Subtarget & Subtarget,SDValue * InGlue=nullptr) getv64i1Argument() argument
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| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 983 CCValAssign &NextVA = ArgLocs[++i]; in LowerCall_32() local
473 CCValAssign &NextVA = ArgLocs[++i]; LowerFormalArguments_32() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3736 CCValAssign &NextVA = ArgLocs[++i]; LowerFormalArguments() local
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