H A D | RegAllocGreedy.cpp | 401 tryAssign(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs,const SmallVirtRegSet & FixedRegisters) tryAssign() argument 485 evictInterference(const LiveInterval & VirtReg,MCRegister PhysReg,SmallVectorImpl<Register> & NewVRegs) evictInterference() argument 581 tryEvict(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs,uint8_t CostPerUseLimit,const SmallVirtRegSet & FixedRegisters) tryEvict() argument 1064 tryRegionSplit(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs) tryRegionSplit() argument 1193 doRegionSplit(const LiveInterval & VirtReg,unsigned BestCand,bool HasCompact,SmallVectorImpl<Register> & NewVRegs) doRegionSplit() argument 1235 trySplitAroundHintReg(MCPhysReg Hint,const LiveInterval & VirtReg,SmallVectorImpl<Register> & NewVRegs,AllocationOrder & Order) trySplitAroundHintReg() argument 1297 tryBlockSplit(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs) tryBlockSplit() argument 1418 tryInstructionSplit(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs) tryInstructionSplit() argument 1571 tryLocalSplit(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs) tryLocalSplit() argument 1801 trySplit(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs,const SmallVirtRegSet & FixedRegisters) trySplit() argument 1958 tryLastChanceRecoloring(const LiveInterval & VirtReg,AllocationOrder & Order,SmallVectorImpl<Register> & NewVRegs,SmallVirtRegSet & FixedRegisters,RecoloringStack & RecolorStack,unsigned Depth) tryLastChanceRecoloring() argument 2109 tryRecoloringCandidates(PQueue & RecoloringQueue,SmallVectorImpl<Register> & NewVRegs,SmallVirtRegSet & FixedRegisters,RecoloringStack & RecolorStack,unsigned Depth) tryRecoloringCandidates() argument 2145 selectOrSplit(const LiveInterval & VirtReg,SmallVectorImpl<Register> & NewVRegs) selectOrSplit() argument 2178 tryAssignCSRFirstTime(const LiveInterval & VirtReg,AllocationOrder & Order,MCRegister PhysReg,uint8_t & CostPerUseLimit,SmallVectorImpl<Register> & NewVRegs) tryAssignCSRFirstTime() argument 2411 selectOrSplitImpl(const LiveInterval & VirtReg,SmallVectorImpl<Register> & NewVRegs,SmallVirtRegSet & FixedRegisters,RecoloringStack & RecolorStack,unsigned Depth) selectOrSplitImpl() argument [all...] |