| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 147 BinaryOperator *NewShift = BinaryOperator::Create(ShiftOpcode, X, NewShAmt); in reassociateShiftAmtsOfTwoSameDirectionShifts() local
331 auto *NewShift = BinaryOperator::Create(OuterShift->getOpcode(), X, dropRedundantMaskingOfLeftShiftInput() local
431 if (auto *NewShift = cast_or_null<Instruction>( commonShiftTransforms() local
821 Value *NewShift = FoldShiftByConstant() local
850 Value *NewShift = Builder.CreateBinOp(I.getOpcode(), FalseVal, C1); FoldShiftByConstant() local
867 Value *NewShift = Builder.CreateBinOp(I.getOpcode(), TrueVal, C1); FoldShiftByConstant() local
1110 Value *NewShift = Builder.CreateBinOp(ShiftOpc, X, ShiftDiffC, "sh.diff"); visitShl() local
1185 Value *NewShift = Builder.CreateShl(X, Op1); visitShl() local
1454 Value *NewShift = Builder.CreateLShr(NarrowSwap, ShAmtC - WidthDiff); visitLShr() local
[all...] |
| H A D | InstCombineCompares.cpp | 1713 Value *NewShift = foldICmpAndShift() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3998 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt); performShlCombine() local
4022 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, performSraCombine() local
4032 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, performSraCombine() local
4082 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst); performSrlCombine() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2697 SDValue NewShift = DAG.getNode(IsAdd ? ISD::SRA : ISD::SRL, DL, VT, foldAddSubOfSignBit() local
6904 SDValue NewShift = DAG.getNode(ShiftOpcode, DL, VT, LogicX, Y); foldLogicOfShifts() local
9734 SDValue NewShift = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(0), visitShiftByConstant() local
10570 SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT, visitSRL() local
10580 SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT, visitSRL() local
[all...] |
| H A D | TargetLowering.cpp | 1854 SDValue NewShift = TLO.DAG.getNode(ISD::SHL, dl, HalfVT, NewOp, SimplifyDemandedBits() local
1956 SDValue NewShift = SimplifyDemandedBits() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2081 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1)); foldMaskedShiftToScaledMask() local
|
| H A D | X86ISelLowering.cpp | 41826 SDValue NewShift = TLO.DAG.getNode( SimplifyDemandedBitsForTargetNode() local
47139 SDValue NewShift = DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), N1); combineShiftRightLogical() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2581 Register NewShift = applyCombineTruncOfShift() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17460 SDValue NewShift = DAG.getNode(NewOpcode, DL, N->getVTList(), Op0, Op1, PerformLongShiftCombine() local
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