| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.h | 57 const TargetRegisterClass *NewRC = nullptr; variable
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| H A D | CriticalAntiDepBreaker.cpp | 187 const TargetRegisterClass *NewRC = nullptr; in PrescanInstruction() local
315 const TargetRegisterClass *NewRC = nullptr; in ScanInstruction() local
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| H A D | MachineRegisterInfo.cpp | 74 const TargetRegisterClass *NewRC = in constrainRegClass() local
125 const TargetRegisterClass *NewRC = in recomputeRegClass() local
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| H A D | TailDuplicator.cpp | 442 auto *NewRC = MI->getRegClassConstraint(i, TII, TRI); in duplicateInstruction() local
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| H A D | PeepholeOptimizer.cpp | 766 const TargetRegisterClass *NewRC = MRI.getRegClass(SrcRegs[0].Reg); in insertPHI() local
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| H A D | RegisterCoalescer.cpp | 1345 const TargetRegisterClass *NewRC = CP.getNewRC(); in reMaterializeTrivialDef() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 284 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | LazyCallGraph.cpp | 1651 RefSCC *NewRC = OriginalRC; in addSplitFunction() local
1676 RefSCC *NewRC = createRefSCC(*this); in addSplitFunction() local
1725 RefSCC *NewRC; in addSplitRefRecursiveFunctions() local
1949 RefSCC *NewRC = createRefSCC(*this); in buildRefSCCs() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 350 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument
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| H A D | HexagonVLIWPacketizer.cpp | 362 const TargetRegisterClass *NewRC) { in isNewifiable()
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| H A D | HexagonBitSimplify.cpp | 2628 BitTracker::RegisterCell NewRC(W); in simplifyRCmp0() local
2696 BitTracker::RegisterCell NewRC(W); in simplifyRCmp0() local
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| H A D | HexagonFrameLowering.cpp | 2244 const TargetRegisterClass *NewRC) -> const TargetRegisterClass * { in optimizeSpillSlots()
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| H A D | HexagonConstPropagation.cpp | 2904 const TargetRegisterClass *NewRC; in rewriteHexConstDefs() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 381 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 784 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 859 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 1028 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 2262 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| H A D | SIInstrInfo.cpp | 5929 const TargetRegisterClass *NewRC = in moveToVALU() local
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| H A D | SIISelLowering.cpp | 11369 auto *NewRC = TRI->getEquivalentVGPRClass(RC); in AdjustInstrPostInstrSelection() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 5033 const TargetRegisterClass *NewRC = in transformToImmFormFedByLI() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 5325 auto *NewRC = MRI.constrainRegClass( in updateOperandRegConstraints() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaTemplate.cpp | 7885 const Expr *NewRC = New->getRequiresClause(); in TemplateParameterListsAreEqual() local
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| H A D | SemaOverload.cpp | 1297 Expr *NewRC = New->getTrailingRequiresClause(), in IsOverload() local
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