Home
last modified time | relevance | path

Searched defs:NewOpc (Results 1 – 25 of 56) sorted by relevance

123

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FixupLEAs.cpp598 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
636 unsigned NewOpc = in processInstrForSlow3OpLEA() local
642 unsigned NewOpc = getADDriFromLEA(MI.getOpcode(), Offset); in processInstrForSlow3OpLEA() local
670 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
693 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
H A DX86EvexToVex.cpp149 static bool performCustomAdjustments(MachineInstr &MI, unsigned NewOpc, in performCustomAdjustments()
260 unsigned NewOpc = I->VexOpcode; in CompressEvexToVexImpl() local
H A DX86MCInstLower.cpp517 unsigned NewOpc; in Lower() local
549 unsigned NewOpc; in Lower() local
574 unsigned NewOpc; in Lower() local
617 unsigned NewOpc; in Lower() local
689 unsigned NewOpc; in Lower() local
853 unsigned NewOpc; in Lower() local
878 unsigned NewOpc; in Lower() local
H A DX86InstructionSelector.cpp530 unsigned NewOpc = getLoadStoreOp(Ty, RB, Opc, MemOp.getAlign()); in selectLoadStoreOp() local
572 unsigned NewOpc = getLeaOP(Ty, STI); in selectFrameIndexOrGep() local
623 unsigned NewOpc = getLeaOP(Ty, STI); in selectGlobalValue() local
655 unsigned NewOpc; in selectConstant() local
H A DX86ISelDAGToDAG.cpp992 unsigned NewOpc; in PreprocessISelDAG() local
1025 unsigned NewOpc; in PreprocessISelDAG() local
1047 unsigned NewOpc; in PreprocessISelDAG() local
1437 unsigned NewOpc; in PostprocessISelDAG() local
1480 unsigned NewOpc; in PostprocessISelDAG() local
3199 unsigned NewOpc = SelectOpcode(X86::NEG64m, X86::NEG32m, X86::NEG16m, in foldLoadStoreIntoMemOperand() local
3214 unsigned NewOpc = in foldLoadStoreIntoMemOperand() local
3304 unsigned NewOpc = SelectRegOpcode(Opc); in foldLoadStoreIntoMemOperand() local
3710 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local
3726 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostSelectOptimize.cpp143 unsigned NewOpc = getNonFlagSettingVariant(II.getOpcode()); in optimizeNZCVDefs() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMExpandPseudoInsts.cpp1915 unsigned NewOpc = Opcode == ARM::VBSPd ? ARM::VBITd : ARM::VBITq; in ExpandMI() local
1925 unsigned NewOpc = Opcode == ARM::VBSPd ? ARM::VBIFd : ARM::VBIFq; in ExpandMI() local
1935 unsigned NewOpc = Opcode == ARM::VBSPd ? ARM::VBSLd : ARM::VBSLq; in ExpandMI() local
2186 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local
2228 unsigned NewOpc; in ExpandMI() local
2505 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local
2536 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
H A DARMLoadStoreOptimizer.cpp1346 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local
1498 unsigned NewOpc; in MergeBaseUpdateLoadStore() local
1635 unsigned NewOpc; in MergeBaseUpdateLSDouble() local
1732 bool isDef, unsigned NewOpc, unsigned Reg, in InsertLDR_STR()
1804 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1828 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
2056 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local
2257 MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc, in CanFormLdStDWord()
2425 unsigned NewOpc = 0; in RescheduleOps() local
H A DThumb2InstrInfo.cpp576 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex() local
609 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
H A DARMConstantIslandPass.cpp1787 unsigned NewOpc = 0; in optimizeThumb2Instructions() local
1838 unsigned NewOpc = 0; in optimizeThumb2Branches() local
1872 unsigned NewOpc = 0; in optimizeThumb2Branches() member
1886 unsigned NewOpc = 0; in optimizeThumb2Branches() local
H A DARMInstructionSelector.cpp899 unsigned NewOpc = selectSimpleExtOpc(I.getOpcode(), SrcSize); in select() local
1095 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select() local
H A DThumbRegisterInfo.cpp404 unsigned NewOpc = convertToNonSPOpcode(Opcode); in rewriteFrameIndex() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64CondBrTuning.cpp100 unsigned NewOpc = TII->convertToFlagSettingOpc(MI.getOpcode(), Is64Bit); in convertToFlagSetting() local
H A DAArch64AdvSIMDScalarPass.cpp292 unsigned NewOpc = getTransformOpcode(OldOpc); in transformInstruction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiMemAluCombiner.cpp252 unsigned NewOpc = mergedOpcode(MemInstr->getOpcode(), AluOffset.isImm()); in insertMergedInstruction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonRDFOpt.cpp224 unsigned OpNum, NewOpc; in rewrite() local
H A DHexagonGenPredicate.cpp389 unsigned NewOpc = getPredForm(Opc); in convertToPredForm() local
H A DHexagonConstExtenders.cpp1565 unsigned NewOpc = Ex.Neg ? Hexagon::S4_subi_asl_ri in insertInitializer() local
1634 unsigned NewOpc = ExtOpc == Hexagon::C2_cmpgei ? Hexagon::C2_cmplt in replaceInstrExact() local
1804 unsigned NewOpc = ExtOpc == Hexagon::M2_naccii ? Hexagon::A2_sub in replaceInstrExpr() local
H A DHexagonCopyToCombine.cpp874 unsigned NewOpc; in emitCombineRR() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp158 unsigned NewOpc = macToMad(Opc); in isInlineConstantIfFolded() local
352 unsigned NewOpc = macToMad(Opc); in tryAddToFoldList() local
671 unsigned NewOpc = AMDGPU::getFlatScratchInstSSfromSV(UseMI->getOpcode()); in foldOperand() local
H A DAMDGPUPostLegalizerCombiner.cpp235 unsigned NewOpc = AMDGPU::G_AMDGPU_CVT_F32_UBYTE0 + MatchInfo.ShiftOffset / 8; in applyCvtF32UByteN() local
H A DSIInstrInfo.cpp966 int NewOpc; in commuteOpcode() local
2726 unsigned NewOpc = isVGPRCopy ? AMDGPU::V_MOV_B32_e32 : AMDGPU::S_MOV_B32; in FoldImmediate() local
2794 unsigned NewOpc = in FoldImmediate() local
2879 unsigned NewOpc = in FoldImmediate() local
3101 unsigned NewOpc = in convertToThreeAddress() local
3114 unsigned NewOpc = IsFMA in convertToThreeAddress() local
3144 unsigned NewOpc = IsFMA ? (IsF16 ? AMDGPU::V_FMA_F16_e64 in convertToThreeAddress() local
4991 int NewOpc = AMDGPU::getGlobalVaddrOp(Opc); in moveFlatAddrToVGPR() local
6082 unsigned NewOpc = Opc == AMDGPU::S_ADD_I32 ? in moveScalarAddSub() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp595 MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, in genInstrWithNewOpc()
H A DMipsBranchExpansion.cpp337 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode()); in replaceBranch() local
H A DMipsInstructionSelector.cpp497 const unsigned NewOpc = selectLoadStoreOpCode(I, MRI); in select() local

123