Home
last modified time | relevance | path

Searched defs:N0 (Results 1 – 25 of 32) sorted by relevance

12

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp929 SDValue N0, N1, N2; in isOneUseSetCC() local
1000 SDValue N0, in reassociationCanBreakAddressingModePattern()
1057 SDValue N0, SDValue N1) { in reassociateOpsCommutative()
1084 SDValue DAGCombiner::reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, in reassociateOps()
1301 SDValue N0 = Op.getOperand(0); in PromoteIntBinOp() local
1369 SDValue N0 = Op.getOperand(0); in PromoteIntShiftOp() local
1797 SDValue N0 = N->getOperand(0); in combine() local
2251 SDValue N0 = N->getOperand(0); in visitADDLike() local
2469 SDValue N0 = N->getOperand(0); in visitADD() local
2535 SDValue N0 = N->getOperand(0); in visitADDSAT() local
[all …]
H A DTargetLowering.cpp3027 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, in buildLegalVectorShuffle()
3141 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithAnd()
3211 EVT SCCVT, SDValue N0, SDValue N1, ISD::CondCode Cond, DAGCombinerInfo &DCI, in optimizeSetCCOfSignedTruncationCheck()
3300 EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond, in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3372 SDValue TargetLowering::foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithBinOp()
3413 SDValue N0, const APInt &C1, in simplifySetCCWithCTPOP()
3482 SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, in SimplifySetCC()
5158 SDValue N0 = N->getOperand(0); in BuildSDIV() local
5315 SDValue N0 = N->getOperand(0); in BuildUDIV() local
H A DInstrEmitter.cpp550 SDValue N0 = Node->getOperand(0); in EmitSubregNode() local
H A DSelectionDAG.cpp2916 SDValue N0 = Op.getOperand(0); in computeKnownBits() local
2924 SDValue N0 = Op.getOperand(0); in computeKnownBits() local
3589 SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0, in computeOverflowKind()
3758 SDValue N0 = Op.getOperand(0); in ComputeNumSignBits() local
8845 SDValue N0 = N.getOperand(0); in salvageDebugInfo() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1367 SDValue N0 = N->getOperand(0); in tryOptimizeRem8Extend() local
1690 SDValue N0 = N.getOperand(0); in matchWrapper() local
3503 SDValue N0 = Node->getOperand(0); in matchBitExtract() local
3643 SDValue N0 = Node->getOperand(0); in matchBEXTRFromAndImm() local
3762 SDValue N0 = Node->getOperand(0); in emitPCMPISTR() local
3795 SDValue N0 = Node->getOperand(0); in emitPCMPESTR() local
4176 SDValue N0 = N->getOperand(0); in tryVPTERNLOG() local
4380 SDValue N0 = SetccOp0; in tryVPTESTM() local
4539 SDValue N0 = N->getOperand(0); in tryMatchBitSelect() local
4817 SDValue N0 = Node->getOperand(0); in Select() local
[all …]
H A DX86ISelLowering.cpp7550 SDValue N0 = N.getOperand(0); in getFauxShuffleMask() local
7572 SDValue N0 = peekThroughBitcasts(N.getOperand(0)); in getFauxShuffleMask() local
7753 SDValue N0 = N.getOperand(0); in getFauxShuffleMask() local
13578 static SDValue lowerShuffleOfExtractsAsVperm(const SDLoc &DL, SDValue N0, in lowerShuffleOfExtractsAsVperm()
18901 SDValue N0 = Op.getOperand(0); in LowerINSERT_VECTOR_ELT() local
20224 SDValue N0 = Op.getOperand(IsStrict ? 1 : 0); in lowerUINT_TO_FP_v2i32() local
20430 SDValue N0 = Op.getOperand(OpNo); in lowerUINT_TO_FP_vec() local
21854 SDValue N0 = Op.getOperand(0); in LowerFROUND() local
22004 SDValue N0 = Op.getOperand(0); in LowerFGETSIGN() local
22584 SDValue N0 = N->getOperand(0); in BuildSDIVPow2() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.h244 Register N0, N2, N3; member
H A DAMDGPUISelDAGToDAG.cpp919 SDValue &N0, SDValue &N1) { in getBaseWithOffsetUsingSplitOR()
1210 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset() local
1314 SDValue N0 = Addr.getOperand(0); in SelectDSReadWrite2() local
1405 SDValue N0 = Addr; in SelectMUBUF() local
1556 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratchOffen() local
1670 SDValue N0, N1; in SelectFlatOffsetImpl() local
2016 SDValue N0, N1; in SelectSMRD() local
2098 SDValue N0 = Index.getOperand(0); in SelectMOVRELOffset() local
H A DAMDGPUISelLowering.cpp2615 SDValue N0 = Op.getOperand(0); in LowerFP_TO_FP16() local
2980 SDValue N0 = N->getOperand(0); in performAssertSZExtCombine() local
3289 SDValue N0, SDValue N1, unsigned Size, bool Signed) { in getMul24()
3326 SDValue N0 = N->getOperand(0); in performMulCombine() local
3368 SDValue N0 = N->getOperand(0); in performMulhsCombine() local
3392 SDValue N0 = N->getOperand(0); in performMulhuCombine() local
3648 SDValue N0 = N->getOperand(0); in performFNegCombine() local
3858 SDValue N0 = N->getOperand(0); in performFAbsCombine() local
H A DSIISelLowering.cpp7816 SDValue N0 = Offset; in splitBufferOffsets() local
7878 SDValue N0 = CombinedOffset.getOperand(0); in setBufferOffsets() local
8817 SDValue N0 = N->getOperand(0); in performSHLPtrCombine() local
9485 SDValue N0 = N->getOperand(0); in performRcpCombine() local
9739 SDValue N0 = N->getOperand(0); in performFCanonicalizeCombine() local
10274 const SDNode *N0, in getFusedOpcode()
10339 SDValue N0, SDValue N1, SDValue N2, in getMad64_32()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp141 SDValue N0 = N.getOperand(0); in MatchWrapper() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp583 SDValue N0 = Op.getOperand(0); in isADDADDMUL() local
1634 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
1670 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
1707 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
/netbsd-src/external/lgpl3/mpfr/dist/tests/
H A Dtprintf.c552 #define N0 20 in test_locale() macro
H A Dtsprintf.c1741 #define N0 20 in test_locale() macro
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8965 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local
8976 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local
8990 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local
9090 static SDValue LowerSDIV_v4i16(SDValue N0, SDValue N1, const SDLoc &dl, in LowerSDIV_v4i16()
9136 SDValue N0 = Op.getOperand(0); in LowerSDIV() local
9173 SDValue N0 = Op.getOperand(0); in LowerUDIV() local
11879 SDValue N0 = N->getOperand(0); in combineSelectAndUseCommutative() local
11902 static SDValue AddCombineToVPADD(SDNode *N, SDValue N0, SDValue N1, in AddCombineToVPADD()
11930 static SDValue AddCombineVUZPToVPADDL(SDNode *N, SDValue N0, SDValue N1, in AddCombineVUZPToVPADDL()
11983 AddCombineBUILD_VECTORToVPADDL(SDNode *N, SDValue N0, SDValue N1, in AddCombineBUILD_VECTORToVPADDL()
[all …]
H A DARMISelDAGToDAG.cpp419 SDValue N0 = N->getOperand(0); in PreprocessISelDAG() local
3678 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); in Select() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1445 SDValue N0 = N->getOperand(0); in combineSelectAndUseCommutative() local
1459 SDValue N0 = N->getOperand(0); in PerformSUBCombine() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelDAGToDAG.cpp529 SDValue N0 = N.getOperand(0); in matchWrapper() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1002 SDValue N0 = I->getOperand(0), N1 = I->getOperand(1); in ppSimplifyOrSelect0() local
1394 SDValue N0 = N.getOperand(0); in SelectGlobalAddress() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3581 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local
3592 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local
3680 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local
9828 SDValue N0 = N->getOperand(0); in LowerBUILD_VECTOR() local
12011 SDValue N0 = N->getOperand(0); in BuildSDIVPow2() local
12210 SDValue N0 = N->getOperand(0); in performMulCombine() local
12372 SDValue N0 = N->getOperand(0); in performIntToFpCombine() local
12615 SDValue N0 = N->getOperand(0); in tryCombineToBSL() local
12883 SDValue N0 = N->getOperand(0); in performSRLCombine() local
12996 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); in performExtractVectorEltCombine() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp4315 static SDValue PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1, in PerformADDCombineWithOperands()
4425 SDValue N0 = N->getOperand(0); in PerformADDCombine() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp412 SDValue N0 = Node->getOperand(0); in Select() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp9660 SDValue N0 = peekThroughBitcasts(Op.getOperand(0)); in LowerROTL() local
15400 SDValue N0 = N->getOperand(0); in BuildSDIVPow2() local
16354 SDValue N0 = Op.getOperand(0); in getNegatedExpression() local
16441 SDValue N0 = N->getOperand(0); in stripModuloOnShift() local
16475 SDValue N0 = N->getOperand(0); in combineSHL() local
16817 SDValue N0 = N->getOperand(0); in combineFMALike() local
H A DPPCISelDAGToDAG.cpp4934 SDValue N0 = N->getOperand(0); in tryAsSingleRLDIMI() local
5087 SDValue N0 = N->getOperand(0); in Select() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp5868 SDValue N0 = N->getOperand(0); in combineZERO_EXTEND() local
5897 SDValue N0 = N->getOperand(0); in combineSIGN_EXTEND_INREG() local
5918 SDValue N0 = N->getOperand(0); in combineSIGN_EXTEND() local

12