| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 142 AddMulPair(MulCandidate * Mul0,MulCandidate * Mul1,bool Exchange=false) AddMulPair() argument
608 const Instruction *Mul1 = PMul1->Root; CreateParallelPairs() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 570 isADDADDMUL(SDValue Op, SDValue &Mul0, SDValue &Mul1, SDValue &Addend0, in isADDADDMUL() argument
1647 SDValue Mul0, Mul1, Addend0, Addend1; PerformDAGCombine() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2035 SDValue Mul1 = DAG.getNode(ISD::FMUL, DL, MVT::f32, Rcp, LowerUDIVREM64() local
2895 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, X, K1, Flags); lowerFEXP10Unsafe() local
2921 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, K1, Flags); lowerFEXP10Unsafe() local
|
| H A D | AMDGPULegalizerInfo.cpp | 4421 auto Mul1 = B.buildFMul( emitReciprocalU64() local
5052 auto Mul1 = B.buildFMul(S32, LHS, RCP, Flags); legalizeFDIVFastIntrin() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 2003 WeightedLeaf Mul1, Mul2; balanceSubTree() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 1894 MachineOperand &Mul1 = Prev.getOperand(1); combineFPFusedMultiply() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 28515 SDValue Mul1 = DAG.getBitcast(VT, DAG.getNode(Opcode, dl, MulVT, LowerMULH() local
46518 __anon97398207a102(int Mul1, int Mul2, bool isAdd) combineMulSpecial() argument
[all...] |