| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 813 buildVScale(const DstOp & Res,unsigned MinElts) buildVScale() argument
822 buildVScale(const DstOp & Res,const ConstantInt & MinElts) buildVScale() argument
831 buildVScale(const DstOp & Res,const APInt & MinElts) buildVScale() argument
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| /llvm-project/clang/lib/Sema/ |
| H A D | SemaRISCV.cpp | 1379 unsigned MinElts = Info.EC.getKnownMinValue(); checkRVVTypeSupport() local
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| H A D | SemaType.cpp | 8289 unsigned MinElts = Info.EC.getKnownMinValue(); HandleRISCVRVVVectorBitsTypeAttr() local
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| /llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 4375 unsigned MinElts = RetTy->getMinNumElements() / N; UpgradeIntrinsicCall() local
4403 unsigned MinElts = RetTy->getMinNumElements(); UpgradeIntrinsicCall() local
4435 unsigned MinElts = RetTy->getMinNumElements() / N; UpgradeIntrinsicCall() local
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| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 9928 unsigned MinElts = VTy->getMinNumElements(); EmitSVEStructLoad() local
10280 unsigned MinElts = SrcTy->getMinNumElements(); EmitSVETupleCreate() local
10304 unsigned MinElts = IsPredTy ? 16 : VTy->getMinNumElements(); FormSVEBuiltinResult() local
10363 unsigned MinElts = VTy->getMinNumElements(); GetAArch64SVEProcessedOperands() local
14865 unsigned MinElts = std::min( EmitX86BuiltinExpr() local
14974 unsigned MinElts = std::min( EmitX86BuiltinExpr() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 3502 unsigned MinElts = VecVTy->getElementCount().getKnownMinValue(); getInterleavedMemoryOpCost() local
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| H A D | AArch64ISelLowering.cpp | 16397 unsigned MinElts = VecTy->getElementCount().getKnownMinValue(); getNumInterleavedAccesses() local
16415 unsigned MinElts = EC.getKnownMinValue(); isLegalInterleavedAccessType() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 5055 unsigned MinElts = N->getValueType(0).getVectorNumElements(); WidenVecRes_Convert() local
5140 unsigned MinElts = N->getValueType(0).getVectorNumElements(); WidenVecRes_Convert_StrictFP() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 168 unsigned MinElts = RISCV::RVVBitsPerBlock / Subtarget.getELen(); RISCVTargetLowering() local
11683 unsigned MinElts = GatherVT.getVectorMinNumElements(); lowerVPReverseExperimental() local
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| /llvm-project/clang/lib/AST/ |
| H A D | ASTContext.cpp | 9709 uint64_t MinElts = Info.EC.getKnownMinValue(); getRVVTypeSize() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 26564 unsigned MinElts = std::min(Index.getSimpleValueType().getVectorNumElements(), getGatherNode() local
26601 unsigned MinElts = std::min(Index.getSimpleValueType().getVectorNumElements(), getScatterNode() local
32745 unsigned MinElts = VT.getVectorNumElements(); ReplaceNodeResults() local
[all...] |