Searched defs:MatchInfo (Results 1 – 8 of 8) sorted by relevance
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerLowering.cpp | 219 ShuffleVectorPseudo &MatchInfo) { in matchREV() 248 ShuffleVectorPseudo &MatchInfo) { in matchTRN() 269 ShuffleVectorPseudo &MatchInfo) { in matchUZP() 285 ShuffleVectorPseudo &MatchInfo) { in matchZip() 303 ShuffleVectorPseudo &MatchInfo) { in matchDupFromInsertVectorElt() 342 ShuffleVectorPseudo &MatchInfo) { in matchDupFromBuildVector() 357 ShuffleVectorPseudo &MatchInfo) { in matchDup() 374 ShuffleVectorPseudo &MatchInfo) { in matchEXT() 397 ShuffleVectorPseudo &MatchInfo) { in applyShuffleVectorPseudo() 407 static bool applyEXT(MachineInstr &MI, ShuffleVectorPseudo &MatchInfo) { in applyEXT() [all …]
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H A D | AArch64PreLegalizerCombiner.cpp | 65 GISelKnownBits *KB, Register &MatchInfo) { in matchICmpRedundantTrunc() 117 std::pair<uint64_t, uint64_t> &MatchInfo) { in matchFoldGlobalOffset() argument 185 std::pair<uint64_t, uint64_t> &MatchInfo) { in applyFoldGlobalOffset() argument
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H A D | AArch64PostLegalizerCombiner.cpp | 52 std::tuple<unsigned, LLT, Register> &MatchInfo) { in matchExtractVecEltPairwiseAdd() 95 std::tuple<unsigned, LLT, Register> &MatchInfo) { in applyExtractVecEltPairwiseAdd() 246 std::function<void(MachineIRBuilder &)> &MatchInfo) { in matchBitfieldExtractFromSExtInReg()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 691 MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo) { in matchSextInRegOfLoad() 726 MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo) { in applySextInRegOfLoad() 881 IndexedLoadStoreMatchInfo MatchInfo; in tryCombineIndexedLoadStore() local 889 …binerHelper::matchCombineIndexedLoadStore(MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo) { in matchCombineIndexedLoadStore() 911 MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo) { in applyCombineIndexedLoadStore() 1657 PtrAddChain &MatchInfo) { in matchPtrAddImmedChain() 1690 PtrAddChain &MatchInfo) { in applyPtrAddImmedChain() 1703 RegisterImmPair &MatchInfo) { in matchShiftImmedChain() 1748 RegisterImmPair &MatchInfo) { in applyShiftImmedChain() 1782 ShiftOfShiftedLogic &MatchInfo) { in matchShiftOfShiftedLogic() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUPreLegalizerCombiner.cpp | 59 ClampI64ToI16MatchInfo &MatchInfo) { in matchClampI64ToI16() 119 MachineInstr &MI, const ClampI64ToI16MatchInfo &MatchInfo) { in applyClampI64ToI16()
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H A D | AMDGPURegBankCombiner.cpp | 109 MachineInstr &MI, Med3MatchInfo &MatchInfo) { in matchIntMinMaxToMed3() 135 Med3MatchInfo &MatchInfo) { in applyMed3()
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H A D | AMDGPUPostLegalizerCombiner.cpp | 205 MachineInstr &MI, CvtF32UByteMatchInfo &MatchInfo) { in matchCvtF32UByteN() 233 MachineInstr &MI, const CvtF32UByteMatchInfo &MatchInfo) { in applyCvtF32UByteN()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/FileCheck/ |
H A D | FileCheck.cpp | 1289 SmallVector<StringRef, 4> MatchInfo; in match() local
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