Searched defs:Mask0 (Results 1 – 5 of 5) sorted by relevance
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTDC.cpp | 293 int Mask0, Mask1; in convertLogicOp() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 1005 auto IsSubmask = [](const Value *Mask0, const Value *Mask1) { in isNonTargetIntrinsicMatch() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7604 ConstantSDNode *Mask0 = isConstOrConstSplat(N0.getOperand(1)); matchBSwapHWordOrAndAnd() local
24614 SmallVector<int, 16> Mask0(HalfNumElts, -1); foldShuffleOfConcatUndefs() local
25357 ArrayRef<int> Mask0 = Shuf0->getMask(); simplifyShuffleOfShuffle() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6545 auto Mask0 = MIRBuilder.buildConstant(S64, (-1ULL) >> 1); lowerU64ToF32BitOps() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4309 APInt Mask0 = APInt::getBitsSet(NumElems, IdxVal, IdxVal + SubVecNumElems); insert1BitVector() local
5753 SmallVector<int, 64> Mask0, Mask1; getFauxShuffleMask() local
47197 SmallVector<int> Mask0, Mask1, ScaledMask0, ScaledMask1; combineHorizOpWithShuffle() local
47251 SmallVector<int> Mask0, Mask1; combineHorizOpWithShuffle() local
55105 uint64_t Mask0 = Ops[0].getConstantOperandVal(2); combineConcatVectorOps() local
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