/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
H A D | Utils.cpp | 43 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass() 55 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass() 107 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass() 160 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands() local 199 MachineRegisterInfo &MRI) { in canReplaceReg() 213 const MachineRegisterInfo &MRI) { in isTriviallyDead() 289 const MachineRegisterInfo &MRI) { in getIConstantVRegVal() 300 llvm::getIConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI) { in getIConstantVRegSExtVal() 313 Register VReg, const MachineRegisterInfo &MRI, IsOpcodeFn IsConstantOpcode, in getConstantVRegValWithLookThrough() 410 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs) { in getIConstantVRegValWithLookThrough() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerLowering.cpp | 222 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV() 251 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN() 272 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP() 288 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip() 306 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt() 345 MachineRegisterInfo &MRI, in matchDupFromBuildVector() 360 static bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup() 406 static bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT() 471 static bool matchINS(MachineInstr &MI, MachineRegisterInfo &MRI, in matchINS() 498 static bool applyINS(MachineInstr &MI, MachineRegisterInfo &MRI, in applyINS() [all …]
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H A D | AArch64PostLegalizerCombiner.cpp | 54 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd() 97 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd() 113 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended() 119 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended() 125 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine() 238 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine() 248 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext() 256 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext() 269 static bool matchMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchMutateAnyExtToZExt() 286 static void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI, in applyMutateAnyExtToZExt() [all …]
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H A D | AArch64InstructionSelector.cpp | 681 auto &MRI = MF.getRegInfo(); in getImmedFromMO() local 706 const MachineRegisterInfo &MRI, in unsupportedBinOp() 859 static bool copySubReg(MachineInstr &I, MachineRegisterInfo &MRI, in copySubReg() 886 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in getRegClassesForCopy() 913 static bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI, in selectDebugInstr() 943 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in selectCopy() 1113 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect() local 1393 MachineRegisterInfo &MRI) { in getTestBitReg() 1529 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit() local 1602 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ() local [all …]
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H A D | AArch64GlobalISelUtils.cpp | 22 const MachineRegisterInfo &MRI) { in getAArch64VectorSplat() 36 const MachineRegisterInfo &MRI) { in getAArch64VectorSplatScalar() 45 const MachineRegisterInfo &MRI) { in isCMN() 67 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryEmitBZero() local
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H A D | AArch64LegalizerInfo.cpp | 884 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom() local 927 MachineRegisterInfo &MRI, in legalizeRotate() 943 static void extractParts(Register Reg, MachineRegisterInfo &MRI, in extractParts() 954 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeVectorTrunc() local 992 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeSmallCMGlobalValue() 1135 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeShlAshrLshr() 1158 MachineRegisterInfo &MRI) { in matchLDPSTPAddrMode() 1174 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeLoadStore() 1244 MachineRegisterInfo &MRI, in legalizeVaArg() 1292 MachineInstr &MI, MachineRegisterInfo &MRI, LegalizerHelper &Helper) const { in legalizeBitfieldExtract() [all …]
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H A D | AArch64PreLegalizerCombiner.cpp | 39 MachineRegisterInfo &MRI) { in matchFConstantToConstant() 65 static bool matchICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, in matchICmpRedundantTrunc() 94 static bool applyICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, in applyICmpRedundantTrunc() 117 static bool matchFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI, in matchFoldGlobalOffset() 184 static bool applyFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldGlobalOffset() 256 auto &MRI = *B.getMRI(); in tryToSimplifyUADDO() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86InstructionSelector.cpp | 350 MachineRegisterInfo &MRI = MF.getRegInfo(); in select() local 513 const MachineRegisterInfo &MRI, in X86SelectAddress() 539 MachineRegisterInfo &MRI, in selectLoadStoreOp() 599 MachineRegisterInfo &MRI, in selectFrameIndexOrGep() 627 MachineRegisterInfo &MRI, in selectGlobalValue() 673 MachineRegisterInfo &MRI, in selectConstant() 730 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY() 745 MachineRegisterInfo &MRI, in selectTruncOrPtrToInt() 811 MachineRegisterInfo &MRI, in selectZext() 876 MachineRegisterInfo &MRI, in selectAnyext() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 102 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr() 154 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift() 168 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate() 203 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg() 240 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst() 260 MachineRegisterInfo *MRI = &MF->getRegInfo(); in removeLD() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/ |
H A D | SPIRVPreLegalizer.cpp | 42 MachineRegisterInfo &MRI = MF.getRegInfo(); in addConstantsToTrack() local 97 MachineRegisterInfo &MRI = MF.getRegInfo(); in foldConstantsIntoIntrinsics() local 146 MachineRegisterInfo &MRI, in propagateSPIRVType() 197 MachineRegisterInfo &MRI) { in insertAssignInstr() 227 MachineRegisterInfo &MRI = MF.getRegInfo(); in generateAssignInstrs() local 303 createNewIdReg(Register ValReg, unsigned Opcode, MachineRegisterInfo &MRI, in createNewIdReg() 331 MachineRegisterInfo &MRI, SPIRVGlobalRegistry *GR) { in processInstr() 357 MachineRegisterInfo &MRI = MF.getRegInfo(); in processInstrsWithTypeFolding() local 422 MachineRegisterInfo &MRI = MF.getRegInfo(); in processSwitches() local
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/openbsd-src/gnu/llvm/llvm/include/llvm/Support/ |
H A D | ModRef.h | 39 [[nodiscard]] inline bool isNoModRef(const ModRefInfo MRI) { in isNoModRef() 42 [[nodiscard]] inline bool isModOrRefSet(const ModRefInfo MRI) { in isModOrRefSet() 45 [[nodiscard]] inline bool isModAndRefSet(const ModRefInfo MRI) { in isModAndRefSet() 48 [[nodiscard]] inline bool isModSet(const ModRefInfo MRI) { in isModSet() 51 [[nodiscard]] inline bool isRefSet(const ModRefInfo MRI) { in isRefSet()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
H A D | CodeGenCommonISel.cpp | 204 static MachineOperand *getSalvageOpsForCopy(const MachineRegisterInfo &MRI, in getSalvageOpsForCopy() 211 static MachineOperand *getSalvageOpsForTrunc(const MachineRegisterInfo &MRI, in getSalvageOpsForTrunc() 230 static MachineOperand *salvageDebugInfoImpl(const MachineRegisterInfo &MRI, in salvageDebugInfoImpl() 243 void llvm::salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI, in salvageDebugInfoForDbgValue()
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H A D | LivePhysRegs.cpp | 141 bool LivePhysRegs::available(const MachineRegisterInfo &MRI, in available() 176 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs() local 251 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns() local 262 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns() local 283 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsRegisterBankInfo.cpp | 180 Register Reg, const MachineRegisterInfo &MRI) { in addDefUses() 195 Register Reg, const MachineRegisterInfo &MRI) { in addUseDef() 206 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing() local 220 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming() local 233 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer() local 367 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister() local 433 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local 731 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | GCNRegPressure.cpp | 39 const MachineRegisterInfo &MRI) { in getRegKind() 53 const MachineRegisterInfo &MRI) { in inc() 159 const MachineRegisterInfo &MRI) { in getDefRegMask() 171 const MachineRegisterInfo &MRI, in getUsedRegMask() 191 const MachineRegisterInfo &MRI) { in collectVirtualRegUses() 218 const MachineRegisterInfo &MRI) { in getLiveLaneMask() 236 const MachineRegisterInfo &MRI) { in getLiveRegs() 457 const MachineRegisterInfo &MRI) { in print()
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H A D | SIInstrInfo.cpp | 135 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); in resultDependsOnExec() local 1072 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in materializeImmediate() local 1135 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in insertVectorSelect() local 1259 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in insertEQ() local 1272 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in insertNE() local 1594 MachineRegisterInfo &MRI = MF->getRegInfo(); in storeRegToStackSlot() local 1806 MachineRegisterInfo &MRI = MF->getRegInfo(); in loadRegFromStackSlot() local 2298 MachineRegisterInfo &MRI = MF->getRegInfo(); in expandMovDPP64() local 2524 MachineRegisterInfo &MRI = MF->getRegInfo(); in insertIndirectBranch() local 2856 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in canInsertSelect() local [all …]
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H A D | AMDGPURegisterBankInfo.cpp | 101 MachineRegisterInfo &MRI; member in __anon2a3621150111::ApplyRegBankMapping 298 const MachineInstr &MI, const MachineRegisterInfo &MRI, in addMappingFromTable() 457 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local 646 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping() local 663 static void setRegsToType(MachineRegisterInfo &MRI, ArrayRef<Register> Regs, in setRegsToType() 685 MachineRegisterInfo &MRI, in buildReadFirstLane() 974 MachineRegisterInfo &MRI, ArrayRef<unsigned> OpIndices) const { in collectWaterfallOperands() 988 MachineIRBuilder &B, MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop() 1003 MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop() 1011 MachineInstr &MI, MachineRegisterInfo &MRI, unsigned OpIdx) const { in constrainOpWithReadfirstlane() [all …]
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H A D | AMDGPULegalizerInfo.cpp | 1742 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeCustom() local 1824 MachineRegisterInfo &MRI, in getSegmentAperture() 1909 static bool isKnownNonNull(Register Val, MachineRegisterInfo &MRI, in isKnownNonNull() 1929 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeAddrSpaceCast() 2042 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFrint() 2068 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFceil() 2097 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFrem() 2131 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeIntrinsicTrunc() 2176 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeITOFP() 2239 MachineRegisterInfo &MRI, in legalizeFPTOI() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCRegisterBankInfo.cpp | 73 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local 239 const MachineRegisterInfo &MRI, in hasFPConstraints() 279 const MachineRegisterInfo &MRI, in onlyUsesFP() 298 const MachineRegisterInfo &MRI, in onlyDefinesFP()
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H A D | PPCCallLowering.h | 42 MachineRegisterInfo &MRI) in PPCIncomingValueHandler() 66 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAsmBackendDarwin.h | 18 const MCRegisterInfo &MRI; variable 23 const MCRegisterInfo &MRI) in ARMAsmBackendDarwin()
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | CSEInfo.h | 75 MachineRegisterInfo *MRI = nullptr; variable 169 const MachineRegisterInfo &MRI; variable 172 GISelInstProfileBuilder(FoldingSetNodeID &ID, const MachineRegisterInfo &MRI) in GISelInstProfileBuilder()
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H A D | MIPatternMatch.h | 25 [[nodiscard]] bool mi_match(Reg R, const MachineRegisterInfo &MRI, in mi_match() 31 [[nodiscard]] bool mi_match(MachineInstr &MI, const MachineRegisterInfo &MRI, in mi_match() 71 const MachineRegisterInfo &MRI) { in matchConstant() 77 const MachineRegisterInfo &MRI) { in matchConstant() 106 const MachineRegisterInfo &MRI) { in matchConstantSplat() 112 matchConstantSplat(Register Reg, const MachineRegisterInfo &MRI) { in matchConstantSplat()
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/openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/ |
H A D | NVPTXPeephole.cpp | 84 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate() local 112 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal() local 157 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegStackify.cpp | 99 MachineRegisterInfo &MRI, in convertImplicitDefToConstZero() 266 const MachineRegisterInfo &MRI, in getVRegDef() 283 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, in hasOneUse() 315 const MachineRegisterInfo &MRI) { in isSafeToMove() 436 const MachineRegisterInfo &MRI, in oneUseDominatesOtherUses() 524 MachineRegisterInfo &MRI) { in moveForSingleUse() 568 WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, in rematerializeCheapDef() 636 MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) { in moveAndTeeForMultiUse() 810 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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