| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| H A D | AliasAnalysis.h | 185 LLVM_NODISCARD inline bool isNoModRef(const ModRefInfo MRI) { in isNoModRef()
189 LLVM_NODISCARD inline bool isModOrRefSet(const ModRefInfo MRI) { in isModOrRefSet()
192 LLVM_NODISCARD inline bool isModAndRefSet(const ModRefInfo MRI) { in isModAndRefSet()
196 LLVM_NODISCARD inline bool isModSet(const ModRefInfo MRI) { in isModSet()
199 LLVM_NODISCARD inline bool isRefSet(const ModRefInfo MRI) { in isRefSet()
202 LLVM_NODISCARD inline bool isMustSet(const ModRefInfo MRI) { in isMustSet()
206 LLVM_NODISCARD inline ModRefInfo setMod(const ModRefInfo MRI) { in setMod()
210 LLVM_NODISCARD inline ModRefInfo setRef(const ModRefInfo MRI) { in setRef()
214 LLVM_NODISCARD inline ModRefInfo setMust(const ModRefInfo MRI) { in setMust()
218 LLVM_NODISCARD inline ModRefInfo setModAndRef(const ModRefInfo MRI) { in setModAndRef()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 38 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
50 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
95 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
142 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands() local
181 MachineRegisterInfo &MRI) { in canReplaceReg()
195 const MachineRegisterInfo &MRI) { in isTriviallyDead()
271 const MachineRegisterInfo &MRI) { in getConstantVRegVal()
282 const MachineRegisterInfo &MRI) { in getConstantVRegSExtVal()
290 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs, in getConstantVRegValWithLookThrough()
369 const MachineRegisterInfo &MRI) { in getConstantIntVRegVal()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 218 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
247 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
268 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
284 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
302 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt()
341 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
356 static bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup()
373 static bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT()
429 static bool matchINS(MachineInstr &MI, MachineRegisterInfo &MRI, in matchINS()
456 static bool applyINS(MachineInstr &MI, MachineRegisterInfo &MRI, in applyINS()
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| H A D | AArch64GlobalISelUtils.cpp | 22 const MachineRegisterInfo &MRI) { in getAArch64VectorSplat()
36 const MachineRegisterInfo &MRI) { in getAArch64VectorSplatScalar()
45 const MachineRegisterInfo &MRI) { in isCMN()
67 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in tryEmitBZero() local
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| H A D | AArch64InstructionSelector.cpp | 595 auto &MRI = MF.getRegInfo(); in getImmedFromMO() local
620 const MachineRegisterInfo &MRI, in unsupportedBinOp()
772 const MachineRegisterInfo &MRI, in isValidCopy()
804 static bool copySubReg(MachineInstr &I, MachineRegisterInfo &MRI, in copySubReg()
831 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in getRegClassesForCopy()
856 MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, in selectCopy()
1045 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect() local
1241 MachineRegisterInfo &MRI) { in getTestBitReg()
1369 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit() local
1442 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ() local
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| H A D | AArch64PostLegalizerCombiner.cpp | 51 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
94 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
110 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
116 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
122 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
235 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
245 MachineInstr &MI, MachineRegisterInfo &MRI, in matchBitfieldExtractFromSExtInReg()
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| H A D | AArch64LegalizerInfo.cpp | 751 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom() local
785 MachineRegisterInfo &MRI, in legalizeRotate()
801 static void extractParts(Register Reg, MachineRegisterInfo &MRI, in extractParts()
812 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeVectorTrunc() local
849 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeSmallCMGlobalValue()
910 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeShlAshrLshr()
933 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeLoadStore()
970 MachineRegisterInfo &MRI, in legalizeVaArg()
1017 MachineInstr &MI, MachineRegisterInfo &MRI, LegalizerHelper &Helper) const { in legalizeBitfieldExtract()
1025 MachineRegisterInfo &MRI, in legalizeCTPOP()
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| H A D | AArch64PreLegalizerCombiner.cpp | 38 MachineRegisterInfo &MRI) { in matchFConstantToConstant()
64 static bool matchICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, in matchICmpRedundantTrunc()
93 static bool applyICmpRedundantTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, in applyICmpRedundantTrunc()
116 static bool matchFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI, in matchFoldGlobalOffset()
182 static bool applyFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldGlobalOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 315 MachineRegisterInfo &MRI = MF.getRegInfo(); in select() local
475 const MachineRegisterInfo &MRI, in X86SelectAddress()
501 MachineRegisterInfo &MRI, in selectLoadStoreOp()
561 MachineRegisterInfo &MRI, in selectFrameIndexOrGep()
589 MachineRegisterInfo &MRI, in selectGlobalValue()
635 MachineRegisterInfo &MRI, in selectConstant()
692 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
707 MachineRegisterInfo &MRI, in selectTruncOrPtrToInt()
773 MachineRegisterInfo &MRI, in selectZext()
838 MachineRegisterInfo &MRI, in selectAnyext()
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| H A D | X86RegisterBankInfo.cpp | 112 const MachineInstr &MI, const MachineRegisterInfo &MRI, const bool isFP, in getInstrPartialMappingIdxs()
148 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getSameOperandsMapping() local
164 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
283 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 91 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
145 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
159 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
194 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
231 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
246 MachineRegisterInfo *MRI = &MF->getRegInfo(); in removeLD() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackendDarwin.h | 18 const MCRegisterInfo &MRI; variable
23 const MCRegisterInfo &MRI) in ARMAsmBackendDarwin()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.h | 29 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in MipsHandler()
44 MachineRegisterInfo &MRI; variable
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| H A D | MipsRegisterBankInfo.cpp | 182 Register Reg, const MachineRegisterInfo &MRI) { in addDefUses()
197 Register Reg, const MachineRegisterInfo &MRI) { in addUseDef()
208 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing() local
222 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming() local
235 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer() local
369 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister() local
435 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
732 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 25 const MachineRegisterInfo &MRI) { in printLivesAt()
73 const MachineRegisterInfo &MRI) { in getRegKind()
87 const MachineRegisterInfo &MRI) { in inc()
188 const MachineRegisterInfo &MRI) { in getDefRegMask()
200 const MachineRegisterInfo &MRI, in getUsedRegMask()
220 const MachineRegisterInfo &MRI) { in collectVirtualRegUses()
247 const MachineRegisterInfo &MRI) { in getLiveLaneMask()
265 const MachineRegisterInfo &MRI) { in getLiveRegs()
487 const MachineRegisterInfo &MRI) { in printLiveRegs()
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| H A D | AMDGPURegisterBankInfo.cpp | 100 MachineRegisterInfo &MRI; member in __anonb6f5fc490111::ApplyRegBankMapping
299 const MachineInstr &MI, const MachineRegisterInfo &MRI, in addMappingFromTable()
463 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
651 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping() local
668 static void setRegsToType(MachineRegisterInfo &MRI, ArrayRef<Register> Regs, in setRegsToType()
1045 MachineRegisterInfo &MRI, ArrayRef<unsigned> OpIndices) const { in collectWaterfallOperands()
1059 MachineIRBuilder &B, MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop()
1074 MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop()
1082 MachineInstr &MI, MachineRegisterInfo &MRI, unsigned OpIdx) const { in constrainOpWithReadfirstlane()
1293 MachineRegisterInfo &MRI, int RsrcIdx) const { in applyMappingImage()
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| H A D | AMDGPULegalizerInfo.cpp | 1661 MachineRegisterInfo &MRI = *B.getMRI(); in legalizeCustom() local
1733 MachineRegisterInfo &MRI, in getSegmentAperture()
1791 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeAddrSpaceCast()
1887 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFrint()
1913 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFceil()
1941 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFrem()
1975 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeIntrinsicTrunc()
2020 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeITOFP()
2053 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeFPTOI()
2105 MachineInstr &MI, MachineRegisterInfo &MRI, in legalizeExtractVectorElt()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CSEInfo.h | 75 MachineRegisterInfo *MRI = nullptr; variable
169 const MachineRegisterInfo &MRI; variable
172 GISelInstProfileBuilder(FoldingSetNodeID &ID, const MachineRegisterInfo &MRI) in GISelInstProfileBuilder()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 82 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate() local
107 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal() local
146 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.h | 22 const MCInstrInfo &MII, const MCRegisterInfo &MRI) in AMDGPUInstPrinter()
246 const MCRegisterInfo &MRI) in R600InstPrinter()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | LivePhysRegs.cpp | 139 bool LivePhysRegs::available(const MachineRegisterInfo &MRI, in available()
174 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs() local
245 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns() local
256 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns() local
277 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags() local
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| H A D | MIRVRegNamerUtils.h | 48 MachineRegisterInfo &MRI; variable
85 VRegRenamer(MachineRegisterInfo &MRI) : MRI(MRI) {} in VRegRenamer()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCTargetDesc.cpp | 35 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, in createSparcMCAsmInfo()
45 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, in createSparcV9MCAsmInfo()
90 const MCRegisterInfo &MRI) { in createSparcMCInstPrinter()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyPeephole.cpp | 62 MachineRegisterInfo &MRI) { in maybeRewriteToDrop()
77 MachineRegisterInfo &MRI, in maybeRewriteToFallthrough()
141 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 35 const MCRegisterInfo &MRI; member in __anond35bd71a0111::BPFMCCodeEmitter
76 const MCRegisterInfo &MRI, in createBPFMCCodeEmitter()
82 const MCRegisterInfo &MRI, in createBPFbeMCCodeEmitter()
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