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Searched defs:MO2 (Results 1 – 16 of 16) sorted by relevance

/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp154 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); in printInst() local
131 const MCOperand &MO2 = MI->getOperand(2); printInst() local
430 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printSORegRegOperand() local
450 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printSORegImmOperand() local
467 const MCOperand &MO2 = MI->getOperand(Op + 1); printAM2PreOrOffsetIndexOp() local
498 const MCOperand &MO2 = MI->getOperand(Op + 1); printAddrModeTBB() local
512 const MCOperand &MO2 = MI->getOperand(Op + 1); printAddrModeTBH() local
547 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printAddrMode2OffsetOperand() local
572 const MCOperand &MO2 = MI->getOperand(Op + 1); printAM3PreOrOffsetIndexOp() local
618 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printAddrMode3OffsetOperand() local
645 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printPostIdxRegOperand() local
665 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printMveAddrModeRQOperand() local
692 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printAddrMode5Operand() local
718 const MCOperand &MO2 = MI->getOperand(OpNum+1); printAddrMode5FP16Operand() local
744 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printAddrMode6Operand() local
1134 const MCOperand &MO2 = MI->getOperand(Op + 1); printThumbAddrModeRROperand() local
1157 const MCOperand &MO2 = MI->getOperand(Op + 1); printThumbAddrModeImm5SOperand() local
1209 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printT2SOOperand() local
1225 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printAddrModeImm12Operand() local
1257 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printT2AddrModeImm8Operand() local
1284 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printT2AddrModeImm8s4Operand() local
1317 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printT2AddrModeImm0_1020s4Operand() local
1367 const MCOperand &MO2 = MI->getOperand(OpNum + 1); printT2AddrModeSoRegOperand() local
[all...]
H A DARMMCTargetDesc.cpp447 if (!MO1.isReg() || MO1.getReg() != ARM::PC || !MO2.isImm()) in evaluateMemOpAddrForAddrMode_i12() local
485 if (!MO1.isReg() || MO1.getReg() != ARM::PC || !MO2.isImm()) in evaluateMemOpAddrForAddrMode5() local
465 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); evaluateMemOpAddrForAddrMode3() local
504 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); evaluateMemOpAddrForAddrMode5FP16() local
524 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); evaluateMemOpAddrForAddrModeT2_i8s4() local
[all...]
H A DARMMCCodeEmitter.cpp921 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1275 const MCOperand &MO2 = MI.getOperand(OpIdx+2); getLdStSORegOpValue() local
1369 const MCOperand &MO2 = MI.getOperand(OpIdx+2); getAddrMode3OpValue() local
1532 const MCOperand &MO2 = MI.getOperand(OpIdx + 2); getSORegRegOpValue() local
1616 const MCOperand &MO2 = MI.getOperand(OpNum+1); getT2AddrModeSORegOpValue() local
1636 const MCOperand &MO2 = MI.getOperand(OpNum+1); getT2AddrModeImmOpValue() local
[all...]
/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp129 const MCOperand &MO2 = MI.getOperand(Op + 1); getMemOpValue() local
/llvm-project/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp202 const MachineOperand &MO2) { in isIdenticalOp() argument
214 const MachineOperand &MO2) { in isSimilarDispOp() argument
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H A DX86RegisterInfo.cpp1066 MachineOperand &MO2 = MI->getOperand(2); getTileShape() local
/llvm-project/llvm/unittests/CodeGen/
H A DMachineOperandTest.cpp421 MachineOperand MO2 = MachineOperand::CreateES(SymName2); in TEST() local
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp455 MCOperand &MO2 = MappedInst.getOperand(2); HexagonProcessInstruction() local
/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1289 makeCombineInst(int opCode,MCOperand & Rdd,MCOperand & MO1,MCOperand & MO2) makeCombineInst() argument
1651 MCOperand &MO2 = Inst.getOperand(2); processInstruction() local
1672 MCOperand &MO2 = Inst.getOperand(2); processInstruction() local
/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandPseudoInsts.cpp509 unsigned MO0, MO1, MO2, MO3; expandLargeAddressLoad() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp925 MachineOperand &MO2 = Cond[2]; reverseBranchCondition() local
H A DSIInstrInfo.cpp533 if (MO1->getAddrSpace() != MO2->getAddrSpace()) in memOpsHaveSameBasePtr() local
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2661 auto MO2 = *MI2.memoperands_begin(); memOpsHaveSameBasePtr() local
/llvm-project/llvm/lib/CodeGen/
H A DMachineScheduler.cpp1210 for (const MachineOperand &MO2 : MI.all_defs()) { collectVRegUses() local
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp733 return (MCP->getConstants())[MO2.getIndex()].Val.ConstVal; in getConstantFromConstantPool() local
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp1613 MachineOperand &MO2 = MI.getOperand(0); narrowScalar() local