| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 201 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
215 const MCOperand &MO = MI.getOperand(OpIdx); in getLdStUImm12OpValue() local
236 const MCOperand &MO = MI.getOperand(OpIdx); in getAdrLabelOpValue() local
263 const MCOperand &MO = MI.getOperand(OpIdx); in getAddSubImmOpValue() local
298 const MCOperand &MO = MI.getOperand(OpIdx); in getCondBranchTargetOpValue() local
320 const MCOperand &MO = MI.getOperand(OpIdx); in getLoadLiteralOpValue() local
349 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveWideImmOpValue() local
368 const MCOperand &MO = MI.getOperand(OpIdx); in getTestBranchTargetOpValue() local
390 const MCOperand &MO = MI.getOperand(OpIdx); in getBranchTargetOpValue() local
418 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShifterOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 46 const MCOperand &MO = MI.getOperand(OpNo); in getDirectBrEncoding() local
62 const MCOperand &MO = MI.getOperand(OpNo); in getCondBrEncoding() local
75 const MCOperand &MO = MI.getOperand(OpNo); in getAbsDirectBrEncoding() local
88 const MCOperand &MO = MI.getOperand(OpNo); in getAbsCondBrEncoding() local
110 const MCOperand &MO = MI.getOperand(OpNo); in getImm16Encoding() local
123 const MCOperand &MO = MI.getOperand(OpNo); in getImm34Encoding() local
157 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIEncoding() local
175 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIXEncoding() local
193 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIX16Encoding() local
213 const MCOperand &MO = MI.getOperand(OpNo); in getMemRIHashEncoding() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.h | 51 const MCOperand &MO = MI.getOperand(Idx); in getImmOpValue() local
63 const MCOperand &MO = MI.getOperand(Idx); in getImmShiftOpValue() local
74 const MCOperand &MO = MI.getOperand(Idx); in getBranchSymbolOpValue() local
93 const MCOperand &MO = MI.getOperand(Idx); in getConstpoolSymbolOpValue() local
107 const MCOperand &MO = MI.getOperand(Idx); in getCallSymbolOpValue() local
121 const MCOperand &MO = MI.getOperand(Idx); in getBareSymbolOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64MCInstLower.cpp | 79 MCOperand AArch64MCInstLower::lowerSymbolOperandDarwin(const MachineOperand &MO, in lowerSymbolOperandDarwin()
114 MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO, in lowerSymbolOperandELF()
191 MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO, in lowerSymbolOperandCOFF()
247 MCOperand AArch64MCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand()
258 bool AArch64MCInstLower::lowerOperand(const MachineOperand &MO, in lowerOperand()
305 for (const MachineOperand &MO : MI->operands()) { in Lower() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCCodeEmitter.cpp | 117 const MCOperand &MO = MI.getOperand(tlsOpNo); in encodeInstruction() local
127 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
156 const MCOperand &MO = MI.getOperand(OpNo); in getSImm13OpValue() local
187 const MCOperand &MO = MI.getOperand(OpNo); in getCallTargetOpValue() local
214 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue() local
227 const MCOperand &MO = MI.getOperand(OpNo); in getBranchPredTargetOpValue() local
240 const MCOperand &MO = MI.getOperand(OpNo); in getBranchOnRegTargetOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 239 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue() local
261 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue1SImm16() local
283 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMMR6() local
306 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueLsl2MMR6() local
329 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget7OpValueMM() local
350 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMMPC10() local
371 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValueMM() local
393 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget21OpValue() local
415 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget21OpValueMM() local
437 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTarget26OpValue() local
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| /netbsd-src/external/gpl3/gcc/dist/gcc/ginclude/ |
| H A D | stdatomic.h | 93 #define atomic_thread_fence(MO) __atomic_thread_fence (MO) argument
95 #define atomic_signal_fence(MO) __atomic_signal_fence (MO) argument
121 #define atomic_store_explicit(PTR, VAL, MO) \ argument
133 #define atomic_load_explicit(PTR, MO) \ argument
145 #define atomic_exchange_explicit(PTR, VAL, MO) \ argument
194 #define atomic_fetch_add_explicit(PTR, VAL, MO) \ argument
199 #define atomic_fetch_sub_explicit(PTR, VAL, MO) \ argument
204 #define atomic_fetch_or_explicit(PTR, VAL, MO) \ argument
209 #define atomic_fetch_xor_explicit(PTR, VAL, MO) \ argument
214 #define atomic_fetch_and_explicit(PTR, VAL, MO) \ argument
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/ginclude/ |
| H A D | stdatomic.h | 93 #define atomic_thread_fence(MO) __atomic_thread_fence (MO) argument
95 #define atomic_signal_fence(MO) __atomic_signal_fence (MO) argument
121 #define atomic_store_explicit(PTR, VAL, MO) \ argument
133 #define atomic_load_explicit(PTR, MO) \ argument
145 #define atomic_exchange_explicit(PTR, VAL, MO) \ argument
194 #define atomic_fetch_add_explicit(PTR, VAL, MO) \ argument
199 #define atomic_fetch_sub_explicit(PTR, VAL, MO) \ argument
204 #define atomic_fetch_or_explicit(PTR, VAL, MO) \ argument
209 #define atomic_fetch_xor_explicit(PTR, VAL, MO) \ argument
214 #define atomic_fetch_and_explicit(PTR, VAL, MO) \ argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 317 const MCOperand &MO = MI.getOperand(Op); in getModImmOpValue() local
336 const MCOperand &MO = MI.getOperand(Op); in getT2SOImmOpValue() local
552 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
594 const MCOperand &MO = MI.getOperand(OpIdx); in EncodeAddrModeOpValues() local
624 const MCOperand &MO = MI.getOperand(OpIdx); in getBranchTargetOpValue() local
661 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBLTargetOpValue() local
674 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBLXTargetOpValue() local
686 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBRTargetOpValue() local
698 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBCCTargetOpValue() local
710 const MCOperand MO = MI.getOperand(OpIdx); in getThumbCBTargetOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | ReachingDefAnalysis.cpp | 25 static bool isValidReg(const MachineOperand &MO) { in isValidReg()
29 static bool isValidRegUse(const MachineOperand &MO) { in isValidRegUse()
33 static bool isValidRegUseOf(const MachineOperand &MO, MCRegister PhysReg) { in isValidRegUseOf()
37 static bool isValidRegDef(const MachineOperand &MO) { in isValidRegDef()
41 static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg) { in isValidRegDefOf()
122 for (auto &MO : MI->operands()) { in processDefs() local
339 for (auto &MO : MI->operands()) { in getReachingLocalUses() local
355 for (auto &MO : MI.operands()) { in getLiveInUses() local
514 for (auto &MO : Last->operands()) in isReachingDefLiveOut() local
534 for (auto &MO : Last->operands()) in getLocalLiveOutMIDef() local
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| H A D | DetectDeadLanes.cpp | 152 const MachineOperand &MO) { in isCrossCopy()
190 void DetectDeadLanes::addUsedLanesOnOperand(const MachineOperand &MO, in addUsedLanesOnOperand()
218 for (const MachineOperand &MO : MI.uses()) { in transferUsedLanesStep() local
374 for (const MachineOperand &MO : DefMI.uses()) { in determineInitialDefinedLanes() local
416 for (const MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { in determineInitialUsedLanes() local
455 bool DetectDeadLanes::isUndefRegAtInput(const MachineOperand &MO, in isUndefRegAtInput()
462 bool DetectDeadLanes::isUndefInput(const MachineOperand &MO, in isUndefInput()
515 for (const MachineOperand &MO : MRI->use_nodbg_operands(Reg)) in runOnce() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVMCInstLower.cpp | 29 static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym, in lowerSymbolOperand()
90 bool llvm::LowerRISCVMachineOperandToMCOperand(const MachineOperand &MO, in LowerRISCVMachineOperandToMCOperand()
153 for (const MachineOperand &MO : MI->explicit_operands()) { in lowerRISCVVMachineInstrToMCInst() local
214 for (const MachineOperand &MO : MI->operands()) { in lowerRISCVMachineInstrToMCInst() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 245 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, in PrintSymbolOperand()
256 const MachineOperand &MO = MI->getOperand(OpNo); in printOperand() local
593 const MachineOperand &MO = MI->getOperand(2); in EmitTlsCall() local
606 static MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO, in getMCSymbolForTOCPseudoMO()
635 for (const MachineOperand &MO: MI->operands()) { in emitInstruction() local
688 auto GetVKForMO = [&](const MachineOperand &MO) { in emitInstruction()
813 const MachineOperand &MO = MI->getOperand(1); in emitInstruction() local
872 const MachineOperand &MO = MI->getOperand(1); in emitInstruction() local
896 const MachineOperand &MO = MI->getOperand(1); in emitInstruction() local
929 const MachineOperand &MO = MI->getOperand(2); in emitInstruction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEMCInstLower.cpp | 29 const MachineOperand &MO, in LowerSymbolOperand()
43 static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO, in LowerOperand()
82 const MachineOperand &MO = MI->getOperand(i); in LowerVEMachineInstrToMCInst() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcMCInstLower.cpp | 30 const MachineOperand &MO, in LowerSymbolOperand()
68 const MachineOperand &MO, in LowerOperand()
101 const MachineOperand &MO = MI->getOperand(i); in LowerSparcMachineInstrToMCInst() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCMCInstLower.cpp | 29 MCOperand ARCMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand()
76 MCOperand ARCMCInstLower::LowerOperand(const MachineOperand &MO, in LowerOperand()
108 const MachineOperand &MO = MI->getOperand(i); in Lower() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreMCInstLower.cpp | 31 MCOperand XCoreMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand()
77 MCOperand XCoreMCInstLower::LowerOperand(const MachineOperand &MO, in LowerOperand()
107 const MachineOperand &MO = MI->getOperand(i); in Lower() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InstructionSelectorImpl.h | 112 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
217 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
545 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
587 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
605 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
649 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
693 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
718 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
740 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
755 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEMCCodeEmitter.cpp | 100 const MCOperand &MO, in getMachineOpValue()
129 const MCOperand &MO = MI.getOperand(OpNo); in getBranchTargetOpValue() local
141 const MCOperand &MO = MI.getOperand(OpNo); in getCCOpValue() local
151 const MCOperand &MO = MI.getOperand(OpNo); in getRDOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyDebugValueManager.cpp | 66 for (auto &MO : DBI->getDebugOperandsForReg(CurrentReg)) in updateReg() local
77 for (auto &MO : Clone->getDebugOperandsForReg(CurrentReg)) in clone() local
88 for (auto &MO : DBI->getDebugOperandsForReg(CurrentReg)) in replaceWithLocal() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 77 const MachineOperand &MO = MI->getOperand(OpNo); in printOperand() local
128 const MachineOperand &MO = MI->getOperand(OpNo); in PrintAsmOperand() local
216 const MachineOperand &MO = MI.getOperand(1); in smallData() local
425 MCOperand &MO = MappedInst.getOperand(2); in HexagonProcessInstruction() local
488 MCOperand &MO = Inst.getOperand(2); in HexagonProcessInstruction() local
517 MCOperand &MO = MappedInst.getOperand(1); in HexagonProcessInstruction() local
539 MCOperand &MO = MappedInst.getOperand(1); in HexagonProcessInstruction() local
551 MCOperand &MO = MappedInst.getOperand(2); in HexagonProcessInstruction() local
565 MCOperand &MO = MappedInst.getOperand(2); in HexagonProcessInstruction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 38 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO, in GetSymbolRef()
72 bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO, in lowerOperand()
155 for (const MachineOperand &MO : MI->operands()) { in LowerARMMachineInstrToMCInst() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsMCInstLower.cpp | 35 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand()
177 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO, in LowerOperand()
277 const MachineOperand &MO = MI->getOperand(I); in lowerLongBranchADDiu() local
322 const MachineOperand &MO = MI->getOperand(i); in Lower() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 102 const MCOperand &MO, in getMachineOpValue()
155 const MCOperand &MO = MI.getOperand(Op); in getPCRelImmOpValue() local
168 const MCOperand &MO = MI.getOperand(Op); in getCGImmOpValue() local
187 const MCOperand &MO = MI.getOperand(Op); in getCCOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86AsmPrinter.cpp | 114 void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, in PrintSymbolOperand()
207 const MachineOperand &MO = MI->getOperand(OpNo); in PrintOperand() local
250 const MachineOperand &MO = MI->getOperand(OpNo); in PrintModifiedOperand() local
270 const MachineOperand &MO = MI->getOperand(OpNo); in PrintPCRelImm() local
407 static bool printAsmMRegister(const X86AsmPrinter &P, const MachineOperand &MO, in printAsmMRegister()
449 static bool printAsmVRegister(const MachineOperand &MO, char Mode, in printAsmVRegister()
493 const MachineOperand &MO = MI->getOperand(OpNo); in PrintAsmOperand() local
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