| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 573 MCInst const &MIa, bool ExtendedA, in isOrderedDuplexPair() argument
651 bool HexagonMCInstrInfo::isDuplexPair(MCInst const &MIa, MCInst const &MIb) { in isDuplexPair() argument
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| H A D | HexagonMCCompound.cpp | 335 static bool isOrderedCompoundPair(MCInst const &MIa, bool IsExtendedA, in isOrderedCompoundPair() argument
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| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 89 const MachineInstr &MIa, const MachineInstr &MIb) const { in areMemAccessesTriviallyDisjoint() argument
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 1279 mayAlias(MachineInstr & MIa,SmallVectorImpl<MachineInstr * > & MemInsns,AliasAnalysis * AA) mayAlias() argument
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| H A D | AArch64InstrInfo.cpp | 1102 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1987 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
2260 isDuplexPair(const MachineInstr & MIa,const MachineInstr & MIb) const isDuplexPair() argument
[all...] |
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 2261 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1964 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) areMemAccessesTriviallyDisjoint() argument
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2737 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3699 checkInstOffsetsDoNotOverlap(const MachineInstr & MIa,const MachineInstr & MIb) const checkInstOffsetsDoNotOverlap() argument
3723 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 5550 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
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