/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | MVETailPredUtils.h | 92 MachineInstrBuilder MIB = variable 99 MachineInstrBuilder MIB = variable 110 MachineInstrBuilder MIB = variable 133 MachineInstrBuilder MIB = variable 157 MachineInstrBuilder MIB = variable 166 MachineInstrBuilder MIB = variable
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H A D | ARMExpandPseudoInsts.cpp | 537 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD() local 648 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST() local 725 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp() local 810 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL() local 1615 MachineInstrBuilder MIB = in ExpandCMP_SWAP() local 1628 MachineInstrBuilder MIB; in ExpandCMP_SWAP() local 1696 static void addExclusiveRegPair(MachineInstrBuilder &MIB, MachineOperand &Reg, in addExclusiveRegPair() 1745 MachineInstrBuilder MIB; in ExpandCMP_SWAP_64() local 1990 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode)); in ExpandMI() local 2310 MachineInstrBuilder MIB = in ExpandMI() local [all …]
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H A D | ThumbRegisterInfo.cpp | 171 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmInReg() local 311 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg); in emitThumbRegPlusImmediate() local 328 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg); in emitThumbRegPlusImmediate() local 367 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in rewriteFrameIndex() local 463 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in eliminateFrameIndex() local
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H A D | ARMInstructionSelector.cpp | 231 static bool selectMergeValues(MachineInstrBuilder &MIB, in selectMergeValues() 262 static bool selectUnmergeValues(MachineInstrBuilder &MIB, in selectUnmergeValues() 527 MachineInstrBuilder &MIB, in selectCmp() 609 bool ARMInstructionSelector::selectGlobal(MachineInstrBuilder &MIB, in selectGlobal() 653 auto addGOTMemOperand = [this, &MF, Alignment](MachineInstrBuilder &MIB) { in selectGlobal() 767 bool ARMInstructionSelector::selectSelect(MachineInstrBuilder &MIB, in selectSelect() 858 MachineInstrBuilder MIB{MF, I}; in select() local
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H A D | ARMFastISel.cpp | 280 ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) { in AddOptionalDefs() 573 MachineInstrBuilder MIB; in ARMMaterializeGV() local 594 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, in ARMMaterializeGV() local 607 MachineInstrBuilder MIB; in ARMMaterializeGV() local 855 const MachineInstrBuilder &MIB, in AddLoadStoreOperands() 987 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, in ARMEmitLoad() local 1125 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, in ARMEmitStore() local 1435 MachineInstrBuilder MIB; in ARMEmitCmp() local 2162 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, in SelectRet() local 2258 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, in ARMEmitLibcall() local [all …]
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H A D | Thumb2InstrInfo.cpp | 196 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8)); in storeRegToStackSlot() local 237 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8)); in loadRegFromStackSlot() local 393 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg) in emitT2RegPlusImmediate() local 548 MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI); in rewriteT2FrameIndex() local
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H A D | ARMLoadStoreOptimizer.cpp | 796 MachineInstrBuilder MIB; in CreateLoadStoreMulti() local 843 MachineInstrBuilder MIB = BuildMI(MBB, InsertBefore, DL, in CreateLoadStoreDouble() local 956 MachineInstrBuilder MIB(*Merged->getParent()->getParent(), Merged); in MergeOpsUpdate() local 1347 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc)) in MergeBaseUpdateLSMultiple() local 1528 auto MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc)) in MergeBaseUpdateLoadStore() local 1542 auto MIB = in MergeBaseUpdateLoadStore() local 1554 auto MIB = in MergeBaseUpdateLoadStore() local 1567 auto MIB = in MergeBaseUpdateLoadStore() local 1585 auto MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base) in MergeBaseUpdateLoadStore() local 1596 auto MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base) in MergeBaseUpdateLoadStore() local [all …]
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H A D | ARMBaseInstrInfo.cpp | 835 MachineInstrBuilder MIB = in copyFromCPSR() local 855 MachineInstrBuilder MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Opc)); in copyToCPSR() local 867 void llvm::addUnpredicatedMveVpredNOp(MachineInstrBuilder &MIB) { in addUnpredicatedMveVpredNOp() 872 void llvm::addUnpredicatedMveVpredROp(MachineInstrBuilder &MIB, in addUnpredicatedMveVpredROp() 878 void llvm::addPredicatedMveVpredNOp(MachineInstrBuilder &MIB, unsigned Cond) { in addPredicatedMveVpredNOp() 883 void llvm::addPredicatedMveVpredROp(MachineInstrBuilder &MIB, in addPredicatedMveVpredROp() 920 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc), DestReg); in copyPhysReg() local 1102 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg, in AddDReg() 1173 MachineInstrBuilder MIB = BuildMI(MBB, I, DebugLoc(), get(ARM::STRD)); in storeRegToStackSlot() local 1181 MachineInstrBuilder MIB = BuildMI(MBB, I, DebugLoc(), get(ARM::STMIA)) in storeRegToStackSlot() local [all …]
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H A D | ARMInstrInfo.cpp | 123 MachineInstrBuilder MIB; in expandLoadStackGuard() local
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H A D | Thumb2SizeReduction.cpp | 480 auto MIB = BuildMI(MBB, MI, dl, TII->get(Entry.NarrowOpc1)) in ReduceLoadStore() local 592 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, TII->get(Opc)); in ReduceLoadStore() local 660 MachineInstrBuilder MIB = in ReduceSpecial() local 833 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID); in ReduceTo2Addr() local 925 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID); in ReduceToNarrow() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InstrBuilder.h | 124 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem() 143 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset() 148 addOffset(const MachineInstrBuilder &MIB, const MachineOperand& Offset) { in addOffset() 157 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset() 164 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg() 172 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress() 223 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, in addConstantPoolReference()
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H A D | X86FixupBWInsts.cpp | 297 MachineInstrBuilder MIB = in tryReplaceLoad() local 332 MachineInstrBuilder MIB = in tryReplaceCopy() local 360 MachineInstrBuilder MIB = in tryReplaceExtend() local
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H A D | X86CallLowering.cpp | 126 MachineInstrBuilder &MIB; member 138 auto MIB = MIRBuilder.buildInstrNoInsert(X86::RET).addImm(0); in lowerReturn() local 233 MachineInstrBuilder &MIB; member 312 auto MIB = MIRBuilder.buildInstrNoInsert(CallOpc) in lowerCall() local
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H A D | X86InstrInfo.cpp | 1288 MachineInstrBuilder MIB = in convertToThreeAddressWithLEA() local 1441 MachineInstrBuilder MIB = in convertToThreeAddress() local 1477 MachineInstrBuilder MIB = in convertToThreeAddress() local 1500 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc)) in convertToThreeAddress() local 1543 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc)).add(Dest); in convertToThreeAddress() local 1584 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc)) in convertToThreeAddress() local 1625 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc)) in convertToThreeAddress() local 1645 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), in convertToThreeAddress() local 2939 auto MIB = BuildMI(MBB, I, MBB.findDebugLoc(I), get(Opc)); in replaceBranchWithTailCall() local 4469 static bool Expand2AddrUndef(MachineInstrBuilder &MIB, in Expand2AddrUndef() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CSEMIRBuilder.cpp | 120 MachineInstrBuilder CSEMIRBuilder::memoizeMI(MachineInstrBuilder MIB, in memoizeMI() 141 MachineInstrBuilder &MIB) { in generateCopiesIfRequired() 213 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() local 223 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildInstr() local 251 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildConstant() local 278 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildFConstant() local
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H A D | MachineIRBuilder.cpp | 41 MachineInstrBuilder MIB = BuildMI(getMF(), getDL(), getTII().get(Opcode)); in buildInstrNoInsert() local 45 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { in insertInstr() 100 auto MIB = buildInstrNoInsert(TargetOpcode::DBG_VALUE); in buildConstDbgValue() local 121 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel() local 130 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc() local 140 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex() local 153 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue() local 336 auto MIB = buildInstr(TargetOpcode::G_BRCOND); in buildBrCond() local 364 auto MIB = buildInstr(Opcode); in buildLoadInstr() local 394 auto MIB = buildInstr(TargetOpcode::G_STORE); in buildStore() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kExpandPseudo.cpp | 76 MachineInstrBuilder MIB(*MI.getParent()->getParent(), MI); in ExpandMI() local 222 MachineInstrBuilder MIB = in ExpandMI() local 248 MachineInstrBuilder MIB; in ExpandMI() local
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H A D | M68kInstrBuilder.h | 41 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset() 49 addRegIndirectWithDisp(const MachineInstrBuilder &MIB, Register Reg, in addRegIndirectWithDisp()
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H A D | M68kInstrInfo.cpp | 348 bool M68kInstrInfo::ExpandMOVX_RR(MachineInstrBuilder &MIB, MVT MVTDst, in ExpandMOVX_RR() 386 bool M68kInstrInfo::ExpandMOVSZX_RR(MachineInstrBuilder &MIB, bool IsSigned, in ExpandMOVSZX_RR() 435 bool M68kInstrInfo::ExpandMOVSZX_RM(MachineInstrBuilder &MIB, bool IsSigned, in ExpandMOVSZX_RM() 472 bool M68kInstrInfo::ExpandPUSH_POP(MachineInstrBuilder &MIB, in ExpandPUSH_POP() 488 bool M68kInstrInfo::ExpandCCR(MachineInstrBuilder &MIB, bool IsToCCR) const { in ExpandCCR() 505 bool M68kInstrInfo::ExpandMOVEM(MachineInstrBuilder &MIB, in ExpandMOVEM() 559 static bool Expand2AddrUndef(MachineInstrBuilder &MIB, in Expand2AddrUndef() 575 MachineInstrBuilder MIB(*MI.getParent()->getParent(), MI); in expandPostRAPseudo() local 666 MachineInstrBuilder MIB(*MBB.getParent(), MI); in copyPhysReg() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 193 MachineInstrBuilder &MIB, in CreateVirtualRegisters() 299 InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB, in AddRegisterOperand() 370 void InstrEmitter::AddOperand(MachineInstrBuilder &MIB, in AddOperand() 578 MachineInstrBuilder MIB = in EmitSubregNode() local 635 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg); in EmitRegSequence() local 695 auto MIB = BuildMI(*MF, DL, DbgValDesc); in EmitDbgValue() local 713 auto MIB = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE)); in EmitDbgValue() local 733 auto MIB = BuildMI(*MF, DL, DbgValDesc); in EmitDbgValue() local 749 MachineInstrBuilder &MIB, const MCInstrDesc &DbgValDesc, in AddDbgValueLocationOps() 835 auto MIB = BuildMI(*MF, DL, RefII); in EmitDbgInstrRef() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerLowering.cpp | 505 MachineIRBuilder MIB(MI); in applyVAshrLshrImm() local 631 MachineIRBuilder &MIB, GISelChangeObserver &Observer) { in applyAdjustICmpImmAndPred() 865 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 872 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 879 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 886 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 893 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 900 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 911 MachineIRBuilder &MIB) { in lowerVectorFCMP()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrBuilder.h | 25 addFrameReference(const MachineInstrBuilder &MIB, int FI) { in addFrameReference()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.cpp | 90 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); in copyPhysReg() local 184 static void addSaveRestoreRegs(MachineInstrBuilder &MIB, in addSaveRestoreRegs() 218 MachineInstrBuilder MIB; in makeFrame() local 248 MachineInstrBuilder MIB; in restoreFrame() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
H A D | VEInstrInfo.cpp | 341 MachineInstrBuilder MIB = in copyPhysSubRegs() local 346 MachineInstrBuilder MIB = in copyPhysSubRegs() local 382 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(VE::VORmvl), DestReg) in copyPhysReg() local 775 static void addOperandsForVFMK(MachineInstrBuilder &MIB, MachineInstr &MI, in addOperandsForVFMK() 942 MachineInstrBuilder MIB = in expandPostRAPseudo() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | PatchableFunction.cpp | 82 auto MIB = BuildMI(FirstMBB, FirstActualI, FirstActualI->getDebugLoc(), in runOnMachineFunction() local
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