1 /* Definitions of target machine for GNU compiler. 2 Hitachi H8/300 version generating coff 3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999, 4 2000, 2001, 2002 Free Software Foundation, Inc. 5 Contributed by Steve Chamberlain (sac@cygnus.com), 6 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). 7 8 This file is part of GNU CC. 9 10 GNU CC is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2, or (at your option) 13 any later version. 14 15 GNU CC is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with GNU CC; see the file COPYING. If not, write to 22 the Free Software Foundation, 59 Temple Place - Suite 330, 23 Boston, MA 02111-1307, USA. */ 24 25 #ifndef GCC_H8300_H 26 #define GCC_H8300_H 27 28 /* Which CPU to compile for. 29 We use int for CPU_TYPE to avoid lots of casts. */ 30 #if 0 /* defined in insn-attr.h, here for documentation */ 31 enum attr_cpu { CPU_H8300, CPU_H8300H }; 32 #endif 33 extern int cpu_type; 34 35 /* Various globals defined in h8300.c. */ 36 37 extern const char *h8_push_op, *h8_pop_op, *h8_mov_op; 38 extern const char * const *h8_reg_names; 39 40 /* Target CPU builtins. */ 41 #define TARGET_CPU_CPP_BUILTINS() \ 42 do \ 43 { \ 44 if (TARGET_H8300H) \ 45 { \ 46 builtin_define ("__H8300H__"); \ 47 builtin_assert ("cpu=h8300h"); \ 48 builtin_assert ("machine=h8300h"); \ 49 if (TARGET_NORMAL_MODE) \ 50 { \ 51 builtin_define ("__NORMAL_MODE__"); \ 52 } \ 53 } \ 54 else if (TARGET_H8300S) \ 55 { \ 56 builtin_define ("__H8300S__"); \ 57 builtin_assert ("cpu=h8300s"); \ 58 builtin_assert ("machine=h8300s"); \ 59 if (TARGET_NORMAL_MODE) \ 60 { \ 61 builtin_define ("__NORMAL_MODE__"); \ 62 } \ 63 } \ 64 else \ 65 { \ 66 builtin_define ("__H8300__"); \ 67 builtin_assert ("cpu=h8300"); \ 68 builtin_assert ("machine=h8300"); \ 69 } \ 70 } \ 71 while (0) 72 73 #define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}" 74 75 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" 76 77 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 78 do \ 79 { \ 80 /* Basic block reordering is only beneficial on targets with cache \ 81 and/or variable-cycle branches where (cycle count taken != \ 82 cycle count not taken). */ \ 83 flag_reorder_blocks = 0; \ 84 } \ 85 while (0) 86 87 /* Print subsidiary information on the compiler version in use. */ 88 89 #define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)"); 90 91 /* Run-time compilation parameters selecting different hardware subsets. */ 92 93 extern int target_flags; 94 95 /* Masks for the -m switches. */ 96 #define MASK_H8300S 0x00000001 97 #define MASK_MAC 0x00000002 98 #define MASK_INT32 0x00000008 99 #define MASK_ADDRESSES 0x00000040 100 #define MASK_QUICKCALL 0x00000080 101 #define MASK_SLOWBYTE 0x00000100 102 #define MASK_NORMAL_MODE 0x00000200 103 #define MASK_RELAX 0x00000400 104 #define MASK_RTL_DUMP 0x00000800 105 #define MASK_H8300H 0x00001000 106 #define MASK_ALIGN_300 0x00002000 107 108 /* Macros used in the machine description to test the flags. */ 109 110 /* Make int's 32 bits. */ 111 #define TARGET_INT32 (target_flags & MASK_INT32) 112 113 /* Dump recorded insn lengths into the output file. This helps debug the 114 md file. */ 115 #define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES) 116 117 /* Pass the first few arguments in registers. */ 118 #define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL) 119 120 /* Pretend byte accesses are slow. */ 121 #define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE) 122 123 /* Dump each assembler insn's rtl into the output file. 124 This is for debugging the compiler only. */ 125 #define TARGET_RTL_DUMP (target_flags & MASK_RTL_DUMP) 126 127 /* Select between the H8/300 and H8/300H CPUs. */ 128 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S) 129 #define TARGET_H8300H (target_flags & MASK_H8300H) 130 #define TARGET_H8300S (target_flags & MASK_H8300S) 131 #define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE) 132 133 /* mac register and relevant instructions are available. */ 134 #define TARGET_MAC (target_flags & MASK_MAC) 135 136 /* Align all values on the H8/300H the same way as the H8/300. Specifically, 137 32 bit and larger values are aligned on 16 bit boundaries. 138 This is all the hardware requires, but the default is 32 bits for the H8/300H. 139 ??? Now watch someone add hardware floating point requiring 32 bit 140 alignment. */ 141 #define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300) 142 143 /* Macro to define tables used to set the flags. 144 This is a list in braces of pairs in braces, 145 each pair being { "NAME", VALUE } 146 where VALUE is the bits to set or minus the bits to clear. 147 An empty string NAME is used to identify the default VALUE. */ 148 149 #define TARGET_SWITCHES \ 150 { {"s", MASK_H8300S, N_("Generate H8S code")}, \ 151 {"no-s", -MASK_H8300S, N_("Do not generate H8S code")}, \ 152 {"s2600", MASK_MAC, N_("Generate H8S/2600 code")}, \ 153 {"no-s2600", -MASK_MAC, N_("Do not generate H8S/2600 code")}, \ 154 {"int32", MASK_INT32, N_("Make integers 32 bits wide")}, \ 155 {"addresses", MASK_ADDRESSES, NULL}, \ 156 {"quickcall", MASK_QUICKCALL, \ 157 N_("Use registers for argument passing")}, \ 158 {"no-quickcall", -MASK_QUICKCALL, \ 159 N_("Do not use registers for argument passing")}, \ 160 {"slowbyte", MASK_SLOWBYTE, \ 161 N_("Consider access to byte sized memory slow")}, \ 162 {"relax", MASK_RELAX, N_("Enable linker relaxing")}, \ 163 {"rtl-dump", MASK_RTL_DUMP, NULL}, \ 164 {"h", MASK_H8300H, N_("Generate H8/300H code")}, \ 165 {"n", MASK_NORMAL_MODE, N_("Enable the normal mode")}, \ 166 {"no-h", -MASK_H8300H, N_("Do not generate H8/300H code")}, \ 167 {"align-300", MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \ 168 { "", TARGET_DEFAULT, NULL}} 169 170 #ifdef IN_LIBGCC2 171 #undef TARGET_H8300H 172 #undef TARGET_H8300S 173 #undef TARGET_NORMAL_MODE 174 /* If compiling libgcc2, make these compile time constants based on what 175 flags are we actually compiling with. */ 176 #ifdef __H8300H__ 177 #define TARGET_H8300H 1 178 #else 179 #define TARGET_H8300H 0 180 #endif 181 #ifdef __H8300S__ 182 #define TARGET_H8300S 1 183 #else 184 #define TARGET_H8300S 0 185 #endif 186 #ifdef __NORMAL_MODE__ 187 #define TARGET_NORMAL_MODE 1 188 #else 189 #define TARGET_NORMAL_MODE 0 190 #endif 191 #endif /* !IN_LIBGCC2 */ 192 193 /* Do things that must be done once at start up. */ 194 195 #define OVERRIDE_OPTIONS \ 196 do \ 197 { \ 198 h8300_init_once (); \ 199 } \ 200 while (0) 201 202 /* Default target_flags if no switches specified. */ 203 204 #ifndef TARGET_DEFAULT 205 #define TARGET_DEFAULT (MASK_QUICKCALL) 206 #endif 207 208 /* Show we can debug even without a frame pointer. */ 209 /* #define CAN_DEBUG_WITHOUT_FP */ 210 211 /* Define this if addresses of constant functions 212 shouldn't be put through pseudo regs where they can be cse'd. 213 Desirable on machines where ordinary constants are expensive 214 but a CALL with constant address is cheap. 215 216 Calls through a register are cheaper than calls to named 217 functions; however, the register pressure this causes makes 218 CSEing of function addresses generally a lose. */ 219 #define NO_FUNCTION_CSE 220 221 /* Target machine storage layout */ 222 223 /* Define this if most significant bit is lowest numbered 224 in instructions that operate on numbered bit-fields. 225 This is not true on the H8/300. */ 226 #define BITS_BIG_ENDIAN 0 227 228 /* Define this if most significant byte of a word is the lowest numbered. */ 229 /* That is true on the H8/300. */ 230 #define BYTES_BIG_ENDIAN 1 231 232 /* Define this if most significant word of a multiword number is lowest 233 numbered. 234 This is true on an H8/300 (actually we can make it up, but we choose to 235 be consistent). */ 236 #define WORDS_BIG_ENDIAN 1 237 238 #define MAX_BITS_PER_WORD 32 239 240 /* Width of a word, in units (bytes). */ 241 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2) 242 #define MIN_UNITS_PER_WORD 2 243 244 #define SHORT_TYPE_SIZE 16 245 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16) 246 #define LONG_TYPE_SIZE 32 247 #define LONG_LONG_TYPE_SIZE 32 248 #define FLOAT_TYPE_SIZE 32 249 #define DOUBLE_TYPE_SIZE 32 250 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE 251 252 #define MAX_FIXED_MODE_SIZE 32 253 254 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 255 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16) 256 257 /* Allocation boundary (in *bits*) for the code of a function. */ 258 #define FUNCTION_BOUNDARY 16 259 260 /* Alignment of field after `int : 0' in a structure. */ 261 /* One can argue this should be 32 for -mint32, but since 32 bit ints only 262 need 16 bit alignment, this is left as is so that -mint32 doesn't change 263 structure layouts. */ 264 #define EMPTY_FIELD_BOUNDARY 16 265 266 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 267 #define PCC_BITFIELD_TYPE_MATTERS 0 268 269 /* No data type wants to be aligned rounder than this. 270 32 bit values are aligned as such on the H8/300H and H8S for speed. */ 271 #define BIGGEST_ALIGNMENT \ 272 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16) 273 274 /* The stack goes in 16/32 bit lumps. */ 275 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32) 276 277 /* Define this if move instructions will actually fail to work 278 when given unaligned data. */ 279 /* On the H8/300, longs can be aligned on halfword boundaries, but not 280 byte boundaries. */ 281 #define STRICT_ALIGNMENT 1 282 283 /* Standard register usage. */ 284 285 /* Number of actual hardware registers. 286 The hardware registers are assigned numbers for the compiler 287 from 0 to just below FIRST_PSEUDO_REGISTER. 288 289 All registers that the compiler knows about must be given numbers, 290 even those that are not normally considered general registers. 291 292 Reg 9 does not correspond to any hardware register, but instead 293 appears in the RTL as an argument pointer prior to reload, and is 294 eliminated during reloading in favor of either the stack or frame 295 pointer. */ 296 297 #define FIRST_PSEUDO_REGISTER 11 298 299 /* 1 for registers that have pervasive standard uses 300 and are not available for the register allocator. */ 301 302 #define FIXED_REGISTERS \ 303 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1} 304 305 /* 1 for registers not available across function calls. 306 These must include the FIXED_REGISTERS and also any 307 registers that can be used without being saved. 308 The latter must include the registers where values are returned 309 and the register where structure-value addresses are passed. 310 Aside from that, you can include as many other registers as you 311 like. 312 313 H8 destroys r0,r1,r2,r3. */ 314 315 #define CALL_USED_REGISTERS \ 316 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 } 317 318 #define REG_ALLOC_ORDER \ 319 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10} 320 321 #define CONDITIONAL_REGISTER_USAGE \ 322 { \ 323 if (!TARGET_MAC) \ 324 fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \ 325 } 326 327 /* Return number of consecutive hard regs needed starting at reg REGNO 328 to hold something of mode MODE. 329 330 This is ordinarily the length in words of a value of mode MODE 331 but can be less for certain modes in special long registers. 332 333 We pretend the MAC register is 32bits -- we don't have any data 334 types on the H8 series to handle more than 32bits. */ 335 336 #define HARD_REGNO_NREGS(REGNO, MODE) \ 337 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 338 339 /* Value is 1 if hard register REGNO can hold a value of machine-mode 340 MODE. 341 342 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI 343 or HI. 344 H8/300H: Anything goes. */ 345 346 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 347 (TARGET_H8300 \ 348 ? ((((REGNO) & 1) == 0) || ((MODE) == HImode) || ((MODE) == QImode)) \ 349 : (REGNO) == MAC_REG ? (MODE) == SImode : 1) 350 351 /* Value is 1 if it is a good idea to tie two pseudo registers 352 when one has mode MODE1 and one has mode MODE2. 353 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 354 for any hard reg, then this must be 0 for correct output. */ 355 #define MODES_TIEABLE_P(MODE1, MODE2) \ 356 ((MODE1) == (MODE2) \ 357 || (((MODE1) == QImode || (MODE1) == HImode \ 358 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \ 359 && ((MODE2) == QImode || (MODE2) == HImode \ 360 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode)))) 361 362 /* Specify the registers used for certain standard purposes. 363 The values of these macros are register numbers. */ 364 365 /* H8/300 pc is not overloaded on a register. */ 366 367 /*#define PC_REGNUM 15*/ 368 369 /* Register to use for pushing function arguments. */ 370 #define STACK_POINTER_REGNUM SP_REG 371 372 /* Base register for access to local variables of the function. */ 373 #define FRAME_POINTER_REGNUM FP_REG 374 375 /* Value should be nonzero if functions must have frame pointers. 376 Zero means the frame pointer need not be set up (and parms 377 may be accessed via the stack pointer) in functions that seem suitable. 378 This is computed in `reload', in reload1.c. */ 379 #define FRAME_POINTER_REQUIRED 0 380 381 /* Base register for access to arguments of the function. */ 382 #define ARG_POINTER_REGNUM AP_REG 383 384 /* Register in which static-chain is passed to a function. */ 385 #define STATIC_CHAIN_REGNUM SC_REG 386 387 /* Fake register that holds the address on the stack of the 388 current function's return address. */ 389 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG 390 391 /* A C expression whose value is RTL representing the value of the return 392 address for the frame COUNT steps up from the current frame. 393 FRAMEADDR is already the frame pointer of the COUNT frame, assuming 394 a stack layout with the frame pointer as the first saved register. */ 395 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME)) 396 397 /* Define the classes of registers for register constraints in the 398 machine description. Also define ranges of constants. 399 400 One of the classes must always be named ALL_REGS and include all hard regs. 401 If there is more than one class, another class must be named NO_REGS 402 and contain no registers. 403 404 The name GENERAL_REGS must be the name of a class (or an alias for 405 another name such as ALL_REGS). This is the class of registers 406 that is allowed by "g" or "r" in a register constraint. 407 Also, registers outside this class are allocated only when 408 instructions express preferences for them. 409 410 The classes must be numbered in nondecreasing order; that is, 411 a larger-numbered class must never be contained completely 412 in a smaller-numbered class. 413 414 For any two classes, it is very desirable that there be another 415 class that represents their union. */ 416 417 enum reg_class { 418 NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES 419 }; 420 421 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 422 423 /* Give names of register classes as strings for dump file. */ 424 425 #define REG_CLASS_NAMES \ 426 { "NO_REGS", "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" } 427 428 /* Define which registers fit in which classes. 429 This is an initializer for a vector of HARD_REG_SET 430 of length N_REG_CLASSES. */ 431 432 #define REG_CLASS_CONTENTS \ 433 { {0}, /* No regs */ \ 434 {0x6ff}, /* GENERAL_REGS */ \ 435 {0x100}, /* MAC_REGS */ \ 436 {0x7ff}, /* ALL_REGS */ \ 437 } 438 439 /* The same information, inverted: 440 Return the class number of the smallest class containing 441 reg number REGNO. This could be a conditional expression 442 or could index an array. */ 443 444 #define REGNO_REG_CLASS(REGNO) (REGNO != MAC_REG ? GENERAL_REGS : MAC_REGS) 445 446 /* The class value for index registers, and the one for base regs. */ 447 448 #define INDEX_REG_CLASS NO_REGS 449 #define BASE_REG_CLASS GENERAL_REGS 450 451 /* Get reg_class from a letter such as appears in the machine description. 452 453 'a' is the MAC register. */ 454 455 #define REG_CLASS_FROM_LETTER(C) ((C) == 'a' ? MAC_REGS : NO_REGS) 456 457 /* The letters I, J, K, L, M, N, O, P in a register constraint string 458 can be used to stand for particular ranges of immediate operands. 459 This macro defines what the ranges are. 460 C is the letter, and VALUE is a constant value. 461 Return 1 if VALUE is in the range specified by C. */ 462 463 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0) 464 #define CONST_OK_FOR_J(VALUE) (((VALUE) & 0xff) == 0) 465 #define CONST_OK_FOR_L(VALUE) \ 466 (TARGET_H8300H || TARGET_H8300S \ 467 ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \ 468 : (VALUE) == 1 || (VALUE) == 2) 469 #define CONST_OK_FOR_N(VALUE) \ 470 (TARGET_H8300H || TARGET_H8300S \ 471 ? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \ 472 : (VALUE) == -1 || (VALUE) == -2) 473 474 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 475 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \ 476 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \ 477 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \ 478 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \ 479 0) 480 481 /* Similar, but for floating constants, and defining letters G and H. 482 Here VALUE is the CONST_DOUBLE rtx itself. 483 484 `G' is a floating-point zero. */ 485 486 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 487 ((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \ 488 : 0) 489 490 /* Given an rtx X being reloaded into a reg required to be 491 in class CLASS, return the class of reg to actually use. 492 In general this is just CLASS; but on some machines 493 in some cases it is preferable to use a more restrictive class. */ 494 495 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS) 496 497 /* Return the maximum number of consecutive registers 498 needed to represent mode MODE in a register of class CLASS. */ 499 500 /* On the H8, this is the size of MODE in words. */ 501 502 #define CLASS_MAX_NREGS(CLASS, MODE) \ 503 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 504 505 /* Any SI register-to-register move may need to be reloaded, 506 so define REGISTER_MOVE_COST to be > 2 so that reload never 507 shortcuts. */ 508 509 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 510 (CLASS1 == MAC_REGS || CLASS2 == MAC_REGS ? 6 : 3) 511 512 /* Stack layout; function entry, exit and calling. */ 513 514 /* Define this if pushing a word on the stack 515 makes the stack pointer a smaller address. */ 516 517 #define STACK_GROWS_DOWNWARD 518 519 /* Define this if the nominal address of the stack frame 520 is at the high-address end of the local variables; 521 that is, each additional local variable allocated 522 goes at a more negative offset in the frame. */ 523 524 #define FRAME_GROWS_DOWNWARD 525 526 /* Offset within stack frame to start allocating local variables at. 527 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 528 first local allocated. Otherwise, it is the offset to the BEGINNING 529 of the first local allocated. */ 530 531 #define STARTING_FRAME_OFFSET 0 532 533 /* If we generate an insn to push BYTES bytes, 534 this says how many the stack pointer really advances by. 535 536 On the H8/300, @-sp really pushes a byte if you ask it to - but that's 537 dangerous, so we claim that it always pushes a word, then we catch 538 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output. 539 540 On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4 541 and doing a similar thing. */ 542 543 #define PUSH_ROUNDING(BYTES) \ 544 (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8) 545 546 /* Offset of first parameter from the argument pointer register value. */ 547 /* Is equal to the size of the saved fp + pc, even if an fp isn't 548 saved since the value is used before we know. */ 549 550 #define FIRST_PARM_OFFSET(FNDECL) 0 551 552 /* Value is the number of bytes of arguments automatically 553 popped when returning from a subroutine call. 554 FUNDECL is the declaration node of the function (as a tree), 555 FUNTYPE is the data type of the function (as a tree), 556 or for a library call it is an identifier node for the subroutine name. 557 SIZE is the number of bytes of arguments passed on the stack. 558 559 On the H8 the return does not pop anything. */ 560 561 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 562 563 /* Definitions for register eliminations. 564 565 This is an array of structures. Each structure initializes one pair 566 of eliminable registers. The "from" register number is given first, 567 followed by "to". Eliminations of the same "from" register are listed 568 in order of preference. 569 570 We have two registers that can be eliminated on the h8300. First, the 571 frame pointer register can often be eliminated in favor of the stack 572 pointer register. Secondly, the argument pointer register can always be 573 eliminated; it is replaced with either the stack or frame pointer. */ 574 575 #define ELIMINABLE_REGS \ 576 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 577 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 578 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},\ 579 { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM},\ 580 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 581 582 /* Given FROM and TO register numbers, say whether this elimination is allowed. 583 Frame pointer elimination is automatically handled. 584 585 For the h8300, if frame pointer elimination is being done, we would like to 586 convert ap and rp into sp, not fp. 587 588 All other eliminations are valid. */ 589 590 #define CAN_ELIMINATE(FROM, TO) \ 591 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 592 593 /* Define the offset between two registers, one to be eliminated, and the other 594 its replacement, at the start of a routine. */ 595 596 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 597 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO))) 598 599 /* Define how to find the value returned by a function. 600 VALTYPE is the data type of the value (as a tree). 601 If the precise function being called is known, FUNC is its FUNCTION_DECL; 602 otherwise, FUNC is 0. 603 604 On the H8 the return value is in R0/R1. */ 605 606 #define FUNCTION_VALUE(VALTYPE, FUNC) \ 607 gen_rtx_REG (TYPE_MODE (VALTYPE), 0) 608 609 /* Define how to find the value returned by a library function 610 assuming the value has mode MODE. */ 611 612 /* On the H8 the return value is in R0/R1. */ 613 614 #define LIBCALL_VALUE(MODE) \ 615 gen_rtx_REG (MODE, 0) 616 617 /* 1 if N is a possible register number for a function value. 618 On the H8, R0 is the only register thus used. */ 619 620 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) 621 622 /* Define this if PCC uses the nonreentrant convention for returning 623 structure and union values. */ 624 625 /*#define PCC_STATIC_STRUCT_RETURN*/ 626 627 /* 1 if N is a possible register number for function argument passing. 628 On the H8, no registers are used in this way. */ 629 630 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0) 631 632 /* Register in which address to store a structure value 633 is passed to a function. */ 634 635 #define STRUCT_VALUE 0 636 637 /* Return true if X should be returned in memory. */ 638 #define RETURN_IN_MEMORY(X) \ 639 (TYPE_MODE (X) == BLKmode || GET_MODE_SIZE (TYPE_MODE (X)) > 4) 640 641 /* When defined, the compiler allows registers explicitly used in the 642 rtl to be used as spill registers but prevents the compiler from 643 extending the lifetime of these registers. */ 644 645 #define SMALL_REGISTER_CLASSES 1 646 647 /* Define a data type for recording info about an argument list 648 during the scan of that argument list. This data type should 649 hold all necessary information about the function itself 650 and about the args processed so far, enough to enable macros 651 such as FUNCTION_ARG to determine where the next arg should go. 652 653 On the H8/300, this is a two item struct, the first is the number 654 of bytes scanned so far and the second is the rtx of the called 655 library function if any. */ 656 657 #define CUMULATIVE_ARGS struct cum_arg 658 struct cum_arg 659 { 660 int nbytes; 661 struct rtx_def *libcall; 662 }; 663 664 /* Initialize a variable CUM of type CUMULATIVE_ARGS 665 for a call to a function whose data type is FNTYPE. 666 For a library call, FNTYPE is 0. 667 668 On the H8/300, the offset starts at 0. */ 669 670 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \ 671 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME) 672 673 /* Update the data in CUM to advance over an argument 674 of mode MODE and data type TYPE. 675 (TYPE is null for libcalls where that information may not be available.) */ 676 677 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 678 ((CUM).nbytes += ((MODE) != BLKmode \ 679 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \ 680 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD)) 681 682 /* Define where to put the arguments to a function. 683 Value is zero to push the argument on the stack, 684 or a hard register in which to store the argument. 685 686 MODE is the argument's machine mode. 687 TYPE is the data type of the argument (as a tree). 688 This is null for libcalls where that information may 689 not be available. 690 CUM is a variable of type CUMULATIVE_ARGS which gives info about 691 the preceding args and about the function being called. 692 NAMED is nonzero if this argument is a named parameter 693 (otherwise it is an extra parameter matching an ellipsis). */ 694 695 /* On the H8/300 all normal args are pushed, unless -mquickcall in which 696 case the first 3 arguments are passed in registers. 697 See function `function_arg'. */ 698 699 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 700 function_arg (&CUM, MODE, TYPE, NAMED) 701 702 /* Output assembler code to FILE to increment profiler label # LABELNO 703 for profiling a function entry. */ 704 705 #define FUNCTION_PROFILER(FILE, LABELNO) \ 706 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \ 707 h8_mov_op, (LABELNO), h8_reg_names[0]); 708 709 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 710 the stack pointer does not matter. The value is tested only in 711 functions that have frame pointers. 712 No definition is equivalent to always zero. */ 713 714 #define EXIT_IGNORE_STACK 0 715 716 /* Output assembler code for a block containing the constant parts 717 of a trampoline, leaving space for the variable parts. 718 719 H8/300 720 vvvv context 721 1 0000 7900xxxx mov.w #0x1234,r3 722 2 0004 5A00xxxx jmp @0x1234 723 ^^^^ function 724 725 H8/300H 726 vvvvvvvv context 727 2 0000 7A00xxxxxxxx mov.l #0x12345678,er3 728 3 0006 5Axxxxxx jmp @0x123456 729 ^^^^^^ function 730 */ 731 732 #define TRAMPOLINE_TEMPLATE(FILE) \ 733 do \ 734 { \ 735 if (TARGET_H8300) \ 736 { \ 737 fprintf (FILE, "\tmov.w #0x1234,r3\n"); \ 738 fprintf (FILE, "\tjmp @0x1234\n"); \ 739 } \ 740 else \ 741 { \ 742 fprintf (FILE, "\tmov.l #0x12345678,er3\n"); \ 743 fprintf (FILE, "\tjmp @0x123456\n"); \ 744 } \ 745 } \ 746 while (0) 747 748 /* Length in units of the trampoline for entering a nested function. */ 749 750 #define TRAMPOLINE_SIZE (TARGET_H8300 ? 8 : 12) 751 752 /* Emit RTL insns to initialize the variable parts of a trampoline. 753 FNADDR is an RTX for the address of the function's pure code. 754 CXT is an RTX for the static chain value for the function. */ 755 756 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 757 { \ 758 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), CXT); \ 759 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), FNADDR); \ 760 if (TARGET_H8300H || TARGET_H8300S) \ 761 emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \ 762 GEN_INT (0x5A)); \ 763 } 764 765 /* Addressing modes, and classification of registers for them. */ 766 767 #define HAVE_POST_INCREMENT 1 768 #define HAVE_PRE_DECREMENT 1 769 770 /* Macros to check register numbers against specific register classes. */ 771 772 /* These assume that REGNO is a hard or pseudo reg number. 773 They give nonzero only if REGNO is a hard reg of the suitable class 774 or a pseudo reg currently allocated to a suitable hard reg. 775 Since they use reg_renumber, they are safe only once reg_renumber 776 has been allocated, which happens in local-alloc.c. */ 777 778 #define REGNO_OK_FOR_INDEX_P(regno) 0 779 780 #define REGNO_OK_FOR_BASE_P(regno) \ 781 (((regno) < FIRST_PSEUDO_REGISTER && regno != 8) || reg_renumber[regno] >= 0) 782 783 /* Maximum number of registers that can appear in a valid memory address. */ 784 785 #define MAX_REGS_PER_ADDRESS 1 786 787 /* 1 if X is an rtx for a constant that is a valid address. */ 788 789 #define CONSTANT_ADDRESS_P(X) \ 790 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 791 || (GET_CODE (X) == CONST_INT \ 792 /* We handle signed and unsigned offsets here. */ \ 793 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \ 794 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \ 795 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST)) 796 797 /* Nonzero if the constant value X is a legitimate general operand. 798 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 799 800 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE) 801 802 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 803 and check its validity for a certain class. 804 We have two alternate definitions for each of them. 805 The usual definition accepts all pseudo regs; the other rejects 806 them unless they have been allocated suitable hard regs. 807 The symbol REG_OK_STRICT causes the latter definition to be used. 808 809 Most source files want to accept pseudo regs in the hope that 810 they will get allocated to the class that the insn wants them to be in. 811 Source files for reload pass need to be strict. 812 After reload, it makes no difference, since pseudo regs have 813 been eliminated by then. */ 814 815 #ifndef REG_OK_STRICT 816 817 /* Nonzero if X is a hard reg that can be used as an index 818 or if it is a pseudo reg. */ 819 #define REG_OK_FOR_INDEX_P(X) 0 820 /* Nonzero if X is a hard reg that can be used as a base reg 821 or if it is a pseudo reg. */ 822 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */ 823 #define REG_OK_FOR_BASE_P(X) \ 824 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != 8) 825 #define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 826 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 827 #define STRICT 0 828 829 #else 830 831 /* Nonzero if X is a hard reg that can be used as an index. */ 832 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 833 /* Nonzero if X is a hard reg that can be used as a base reg. */ 834 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 835 #define STRICT 1 836 837 #endif 838 839 /* Extra constraints. */ 840 841 #define OK_FOR_R(OP) \ 842 (GET_CODE (OP) == CONST_INT \ 843 ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \ 844 : 0) 845 846 #define OK_FOR_S(OP) \ 847 (GET_CODE (OP) == CONST_INT \ 848 ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \ 849 : 0) 850 851 #define OK_FOR_T(OP) \ 852 (GET_CODE (OP) == CONST_INT \ 853 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \ 854 : 0) 855 856 /* 'U' if valid for a bset destination; 857 i.e. a register, register indirect, or the eightbit memory region 858 (a SYMBOL_REF with an SYMBOL_REF_FLAG set). 859 860 On the H8S 'U' can also be a 16bit or 32bit absolute. */ 861 #define OK_FOR_U(OP) \ 862 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \ 863 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ 864 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \ 865 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \ 866 && TARGET_H8300S) \ 867 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \ 868 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \ 869 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \ 870 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \ 871 && (TARGET_H8300S \ 872 || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \ 873 || (GET_CODE (OP) == MEM \ 874 && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \ 875 || (GET_CODE (OP) == MEM && TARGET_H8300S \ 876 && GET_CODE (XEXP (OP, 0)) == CONST_INT)) 877 878 #define EXTRA_CONSTRAINT(OP, C) \ 879 ((C) == 'R' ? OK_FOR_R (OP) : \ 880 (C) == 'S' ? OK_FOR_S (OP) : \ 881 (C) == 'T' ? OK_FOR_T (OP) : \ 882 (C) == 'U' ? OK_FOR_U (OP) : \ 883 0) 884 885 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 886 that is a valid memory address for an instruction. 887 The MODE argument is the machine mode for the MEM expression 888 that wants to use this address. 889 890 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 891 except for CONSTANT_ADDRESS_P which is actually 892 machine-independent. 893 894 On the H8/300, a legitimate address has the form 895 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */ 896 897 /* Accept either REG or SUBREG where a register is valid. */ 898 899 #define RTX_OK_FOR_BASE_P(X) \ 900 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 901 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ 902 && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 903 904 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 905 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \ 906 if (CONSTANT_ADDRESS_P (X)) goto ADDR; \ 907 if (GET_CODE (X) == PLUS \ 908 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \ 909 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR; 910 911 /* Try machine-dependent ways of modifying an illegitimate address 912 to be legitimate. If we find one, return the new, valid address. 913 This macro is used in only one place: `memory_address' in explow.c. 914 915 OLDX is the address as it was before break_out_memory_refs was called. 916 In some cases it is useful to look at this to decide what needs to be done. 917 918 MODE and WIN are passed so that this macro can use 919 GO_IF_LEGITIMATE_ADDRESS. 920 921 It is always safe for this macro to do nothing. It exists to recognize 922 opportunities to optimize the output. 923 924 For the H8/300, don't do anything. */ 925 926 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {} 927 928 /* Go to LABEL if ADDR (a legitimate address expression) 929 has an effect that depends on the machine mode it is used for. 930 931 On the H8/300, the predecrement and postincrement address depend thus 932 (the amount of decrement or increment being the length of the operand). */ 933 934 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 935 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL; 936 937 /* Specify the machine mode that this machine uses 938 for the index in the tablejump instruction. */ 939 #define CASE_VECTOR_MODE Pmode 940 941 /* Define as C expression which evaluates to nonzero if the tablejump 942 instruction expects the table to contain offsets from the address of the 943 table. 944 Do not define this if the table should contain absolute addresses. */ 945 /*#define CASE_VECTOR_PC_RELATIVE 1 */ 946 947 /* Define this as 1 if `char' should by default be signed; else as 0. 948 949 On the H8/300, sign extension is expensive, so we'll say that chars 950 are unsigned. */ 951 #define DEFAULT_SIGNED_CHAR 0 952 953 /* This flag, if defined, says the same insns that convert to a signed fixnum 954 also convert validly to an unsigned one. */ 955 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 956 957 /* Max number of bytes we can move from memory to memory 958 in one reasonably fast instruction. */ 959 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2) 960 #define MAX_MOVE_MAX 4 961 962 /* Nonzero if access to memory by bytes is slow and undesirable. */ 963 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE 964 965 /* Define if shifts truncate the shift count 966 which implies one can omit a sign-extension or zero-extension 967 of a shift count. */ 968 /* #define SHIFT_COUNT_TRUNCATED */ 969 970 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 971 is done just by pretending it is already truncated. */ 972 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 973 974 /* Specify the machine mode that pointers have. 975 After generation of rtl, the compiler makes no further distinction 976 between pointers and any other objects of this machine mode. */ 977 #define Pmode \ 978 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode) 979 980 /* ANSI C types. 981 We use longs for the H8/300H and the H8S because ints can be 16 or 32. 982 GCC requires SIZE_TYPE to be the same size as pointers. */ 983 #define SIZE_TYPE \ 984 (TARGET_H8300 || TARGET_NORMAL_MODE ? "unsigned int" : "long unsigned int") 985 #define PTRDIFF_TYPE \ 986 (TARGET_H8300 || TARGET_NORMAL_MODE ? "int" : "long int") 987 988 #define POINTER_SIZE \ 989 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16) 990 991 #define WCHAR_TYPE "short unsigned int" 992 #define WCHAR_TYPE_SIZE 16 993 #define MAX_WCHAR_TYPE_SIZE 16 994 995 /* A function address in a call instruction 996 is a byte address (for indexing purposes) 997 so give the MEM rtx a byte's mode. */ 998 #define FUNCTION_MODE QImode 999 1000 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ 1001 LENGTH += h8300_adjust_insn_length (INSN, LENGTH); 1002 1003 /* Compute the cost of computing a constant rtl expression RTX 1004 whose rtx-code is CODE. The body of this macro is a portion 1005 of a switch statement. If the code is computed here, 1006 return it with a return statement. Otherwise, break from the switch. */ 1007 1008 #define DEFAULT_RTX_COSTS(RTX, CODE, OUTER_CODE) \ 1009 return (const_costs (RTX, CODE, OUTER_CODE)); 1010 1011 #define BRANCH_COST 0 1012 1013 /* We say that MOD and DIV are so cheap because otherwise we'll 1014 generate some really horrible code for division of a power of two. */ 1015 1016 /* Provide the costs of a rtl expression. This is in the body of a 1017 switch on CODE. */ 1018 1019 #define RTX_COSTS(RTX, CODE, OUTER_CODE) \ 1020 case AND: \ 1021 return COSTS_N_INSNS (h8300_and_costs (RTX)); \ 1022 case MOD: \ 1023 case DIV: \ 1024 return 60; \ 1025 case MULT: \ 1026 return 20; \ 1027 case ASHIFT: \ 1028 case ASHIFTRT: \ 1029 case LSHIFTRT: \ 1030 return COSTS_N_INSNS (h8300_shift_costs (RTX)); \ 1031 case ROTATE: \ 1032 case ROTATERT: \ 1033 if (GET_MODE (RTX) == HImode) return 2; \ 1034 return 8; 1035 1036 /* Tell final.c how to eliminate redundant test instructions. */ 1037 1038 /* Here we define machine-dependent flags and fields in cc_status 1039 (see `conditions.h'). No extra ones are needed for the h8300. */ 1040 1041 /* Store in cc_status the expressions 1042 that the condition codes will describe 1043 after execution of an instruction whose pattern is EXP. 1044 Do not alter them if the instruction would not alter the cc's. */ 1045 1046 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN) 1047 1048 /* The add insns don't set overflow in a usable way. */ 1049 #define CC_OVERFLOW_UNUSABLE 01000 1050 /* The mov,and,or,xor insns don't set carry. That's OK though as the 1051 Z bit is all we need when doing unsigned comparisons on the result of 1052 these insns (since they're always with 0). However, conditions.h has 1053 CC_NO_OVERFLOW defined for this purpose. Rename it to something more 1054 understandable. */ 1055 #define CC_NO_CARRY CC_NO_OVERFLOW 1056 1057 /* Control the assembler format that we output. */ 1058 1059 /* Output at beginning/end of assembler file. */ 1060 1061 #define ASM_FILE_START(FILE) asm_file_start (FILE) 1062 1063 #define ASM_FILE_END(FILE) asm_file_end (FILE) 1064 1065 /* Output to assembler file text saying following lines 1066 may contain character constants, extra white space, comments, etc. */ 1067 1068 #define ASM_APP_ON "; #APP\n" 1069 1070 /* Output to assembler file text saying following lines 1071 no longer contain unusual constructs. */ 1072 1073 #define ASM_APP_OFF "; #NO_APP\n" 1074 1075 #define FILE_ASM_OP "\t.file\n" 1076 #define IDENT_ASM_OP "\t.ident\t" 1077 1078 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */ 1079 #define ASM_WORD_OP \ 1080 (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t") 1081 1082 #define TEXT_SECTION_ASM_OP "\t.section .text" 1083 #define DATA_SECTION_ASM_OP "\t.section .data" 1084 #define BSS_SECTION_ASM_OP "\t.section .bss" 1085 #define INIT_SECTION_ASM_OP "\t.section .init" 1086 #define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata" 1087 1088 #undef DO_GLOBAL_CTORS_BODY 1089 #define DO_GLOBAL_CTORS_BODY \ 1090 { \ 1091 typedef (*pfunc)(); \ 1092 extern pfunc __ctors[]; \ 1093 extern pfunc __ctors_end[]; \ 1094 pfunc *p; \ 1095 for (p = __ctors_end; p > __ctors; ) \ 1096 { \ 1097 (*--p)(); \ 1098 } \ 1099 } 1100 1101 #undef DO_GLOBAL_DTORS_BODY 1102 #define DO_GLOBAL_DTORS_BODY \ 1103 { \ 1104 typedef (*pfunc)(); \ 1105 extern pfunc __dtors[]; \ 1106 extern pfunc __dtors_end[]; \ 1107 pfunc *p; \ 1108 for (p = __dtors; p < __dtors_end; p++) \ 1109 { \ 1110 (*p)(); \ 1111 } \ 1112 } 1113 1114 #define TINY_DATA_NAME_P(NAME) (*(NAME) == '&') 1115 1116 /* How to refer to registers in assembler output. 1117 This sequence is indexed by compiler's hard-register-number (see above). */ 1118 1119 #define REGISTER_NAMES \ 1120 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap" } 1121 1122 #define ADDITIONAL_REGISTER_NAMES \ 1123 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \ 1124 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} } 1125 1126 #define SDB_DEBUGGING_INFO 1 1127 #define SDB_DELIM "\n" 1128 1129 /* Support -gstabs. */ 1130 1131 #include "dbxcoff.h" 1132 1133 /* Override definition in dbxcoff.h. */ 1134 /* Generate a blank trailing N_SO to mark the end of the .o file, since 1135 we can't depend upon the linker to mark .o file boundaries with 1136 embedded stabs. */ 1137 1138 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END 1139 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \ 1140 fprintf (FILE, \ 1141 "\t.text\n.stabs \"\",%d,0,0,.Letext\n.Letext:\n", N_SO) 1142 1143 /* Switch into a generic section. */ 1144 #define TARGET_ASM_NAMED_SECTION h8300_asm_named_section 1145 1146 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ 1147 asm_fprintf ((FILE), "%U%s", (NAME) + (TINY_DATA_NAME_P (NAME) ? 1 : 0)) 1148 1149 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) 1150 1151 /* Globalizing directive for a label. */ 1152 #define GLOBAL_ASM_OP "\t.global " 1153 1154 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ 1155 ASM_OUTPUT_LABEL (FILE, NAME) 1156 1157 /* The prefix to add to user-visible assembler symbols. */ 1158 1159 #define USER_LABEL_PREFIX "_" 1160 1161 /* This is how to output an internal numbered label where 1162 PREFIX is the class of label and NUM is the number within the class. 1163 1164 N.B.: The h8300.md branch_true and branch_false patterns also know 1165 how to generate internal labels. */ 1166 1167 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ 1168 fprintf (FILE, ".%s%d:\n", PREFIX, NUM) 1169 1170 /* This is how to store into the string LABEL 1171 the symbol_ref name of an internal numbered label where 1172 PREFIX is the class of label and NUM is the number within the class. 1173 This is suitable for output with `assemble_name'. */ 1174 1175 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 1176 sprintf (LABEL, "*.%s%d", PREFIX, NUM) 1177 1178 /* This is how to output an insn to push a register on the stack. 1179 It need not be very fast code. */ 1180 1181 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 1182 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO]) 1183 1184 /* This is how to output an insn to pop a register from the stack. 1185 It need not be very fast code. */ 1186 1187 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 1188 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO]) 1189 1190 /* This is how to output an element of a case-vector that is absolute. */ 1191 1192 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1193 fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE) 1194 1195 /* This is how to output an element of a case-vector that is relative. */ 1196 1197 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1198 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL) 1199 1200 /* This is how to output an assembler line 1201 that says to advance the location counter 1202 to a multiple of 2**LOG bytes. */ 1203 1204 #define ASM_OUTPUT_ALIGN(FILE, LOG) \ 1205 if ((LOG) != 0) \ 1206 fprintf (FILE, "\t.align %d\n", (LOG)) 1207 1208 /* This is how to output an assembler line 1209 that says to advance the location counter by SIZE bytes. */ 1210 1211 #define ASM_OUTPUT_IDENT(FILE, NAME) \ 1212 fprintf (FILE, "%s\"%s\"\n", IDENT_ASM_OP, NAME) 1213 1214 #define ASM_OUTPUT_SKIP(FILE, SIZE) \ 1215 fprintf (FILE, "\t.space %d\n", (SIZE)) 1216 1217 /* This says how to output an assembler line 1218 to define a global common symbol. */ 1219 1220 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1221 ( fputs ("\t.comm ", (FILE)), \ 1222 assemble_name ((FILE), (NAME)), \ 1223 fprintf ((FILE), ",%d\n", (SIZE))) 1224 1225 /* This says how to output the assembler to define a global 1226 uninitialized but not common symbol. 1227 Try to use asm_output_bss to implement this macro. */ 1228 1229 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \ 1230 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) 1231 1232 /* This says how to output an assembler line 1233 to define a local common symbol. */ 1234 1235 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1236 ( fputs ("\t.lcomm ", (FILE)), \ 1237 assemble_name ((FILE), (NAME)), \ 1238 fprintf ((FILE), ",%d\n", (SIZE))) 1239 1240 /* Store in OUTPUT a string (made with alloca) containing 1241 an assembler-name for a local static variable named NAME. 1242 LABELNO is an integer which is different for each call. */ 1243 1244 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1245 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1246 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) 1247 1248 /* Print an instruction operand X on file FILE. 1249 Look in h8300.c for details. */ 1250 1251 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1252 ((CODE) == '#') 1253 1254 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1255 1256 /* Print a memory operand whose address is X, on file FILE. 1257 This uses a function in h8300.c. */ 1258 1259 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 1260 1261 /* H8300 specific pragmas. */ 1262 #define REGISTER_TARGET_PRAGMAS(PFILE) \ 1263 do \ 1264 { \ 1265 cpp_register_pragma (PFILE, 0, "saveall", h8300_pr_saveall); \ 1266 cpp_register_pragma (PFILE, 0, "interrupt", h8300_pr_interrupt); \ 1267 } \ 1268 while (0) 1269 1270 #define FINAL_PRESCAN_INSN(insn, operand, nop) \ 1271 final_prescan_insn (insn, operand, nop) 1272 1273 /* Define this macro if GNU CC should generate calls to the System V 1274 (and ANSI C) library functions `memcpy' and `memset' rather than 1275 the BSD functions `bcopy' and `bzero'. */ 1276 1277 #define TARGET_MEM_FUNCTIONS 1 1278 1279 #define MULHI3_LIBCALL "__mulhi3" 1280 #define DIVHI3_LIBCALL "__divhi3" 1281 #define UDIVHI3_LIBCALL "__udivhi3" 1282 #define MODHI3_LIBCALL "__modhi3" 1283 #define UMODHI3_LIBCALL "__umodhi3" 1284 1285 /* Perform target dependent optabs initialization. */ 1286 1287 #define INIT_TARGET_OPTABS \ 1288 do \ 1289 { \ 1290 smul_optab->handlers[(int) HImode].libfunc \ 1291 = init_one_libfunc (MULHI3_LIBCALL); \ 1292 sdiv_optab->handlers[(int) HImode].libfunc \ 1293 = init_one_libfunc (DIVHI3_LIBCALL); \ 1294 udiv_optab->handlers[(int) HImode].libfunc \ 1295 = init_one_libfunc (UDIVHI3_LIBCALL); \ 1296 smod_optab->handlers[(int) HImode].libfunc \ 1297 = init_one_libfunc (MODHI3_LIBCALL); \ 1298 umod_optab->handlers[(int) HImode].libfunc \ 1299 = init_one_libfunc (UMODHI3_LIBCALL); \ 1300 } \ 1301 while (0) 1302 1303 #define MOVE_RATIO 3 1304 1305 #endif /* ! GCC_H8300_H */ 1306