| /openbsd-src/gnu/llvm/llvm/utils/TableGen/ |
| H A D | InfoByHwMode.cpp | 151 unsigned M0 = Map.begin()->first; in operator <() local
156 unsigned M0 = Map.begin()->first; in operator ==() local
161 unsigned M0 = Map.begin()->first; in isSubClassOf() local
167 unsigned M0 = Map.begin()->first; in hasStricterSpillThan() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VE.h | 467 inline unsigned M0(unsigned Val) { return Val + 64; } in M0() function
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| /openbsd-src/gnu/usr.bin/binutils/opcodes/ |
| H A D | ia64-opc-m.c | 24 #define M0 IA64_TYPE_M, 0 macro
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| /openbsd-src/gnu/usr.bin/binutils-2.17/opcodes/ |
| H A D | ia64-opc-m.c | 24 #define M0 IA64_TYPE_M, 0 macro
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| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | AMDGPUUsage.rst | 4859 M0 subsubsection
4872 .. _amdgpu-amdhsa-kernel-prolog-stack-pointer:
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 1065 const MCOperand &M0 = MI.getOperand(OpIdx); in getMveAddrModeRQOpValue() local
1085 const MCOperand &M0 = MI.getOperand(OpIdx); in getMveAddrModeQOpValue() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1085 unsigned M0 = BaseOrd[MaxIF.SrcR], M1 = BaseOrd[MaxIF.InsR]; in pruneCoveredSets() local
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| H A D | HexagonISelDAGToDAG.cpp | 815 SDValue M0 = CurDAG->getTargetConstant(0x18, dl, MVT::i32); in SelectVAlign() local
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| H A D | HexagonISelLowering.cpp | 2722 SDValue M0 = DAG.getConstant(8 / VecWidth, dl, MVT::i32); in extractVectorPred() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3543 SDValue M0 = peekThroughOneUseTruncation(Mask->getOperand(0)); in matchBitExtract() local
3570 SDValue M0 = peekThroughOneUseTruncation(Mask->getOperand(0)); in matchBitExtract() local
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| H A D | X86ISelLowering.cpp | 6276 int M0 = Mask[i]; in canWidenShuffleElements() local
13247 int M0 = Mask[Lane + Elt + 0]; in lowerShuffleAsUNPCKAndPermute() local
15647 int M0 = Mask[2 * DWord + 0]; in lowerV8I16GeneralSingleInputShuffle() local
38870 int M0 = RepeatedMask[Offset]; in matchBinaryPermuteShuffle() local
39847 SDValue M0 = GetHOpSrc(ScaledMask[0]); in canonicalizeShuffleMaskWithHorizOp() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1987 auto LessThan = [](const MergeCandidate* M0, const MergeCandidate *M1) { in LoadStoreMultipleOpti()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 407 SDValue M0 = Lowering.copyToM0(*CurDAG, N->getOperand(0), SDLoc(N), Val); in glueCopyToM0() local
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| H A D | SIISelLowering.cpp | 6179 SDNode *M0 = DAG.getMachineNode(AMDGPU::SI_INIT_M0, DL, MVT::Other, MVT::Glue, in copyToM0() local
7270 SDValue M0 = M->getOperand(2); in LowerINTRINSIC_W_CHAIN() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2234 unsigned M0 = N->getMaskElt(0) / 4; in isXXINSERTWMask() local
2311 unsigned M0 = N->getMaskElt(0) / 4; in isXXSLDWIShuffleMask() local
2410 unsigned M0 = N->getMaskElt(0) / 8; in isXXPERMDIShuffleMask() local
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| /openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 6279 if (auto *M0 = dyn_cast<IntrinsicInst>(Op0)) in simplifyBinaryIntrinsic() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11326 int M0 = M[i]; in isWideTypeMask() local
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7161 int M0 = SV0->getMaskElt(i); in visitOR() local
|