| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | InfoByHwMode.cpp | 149 unsigned M0 = Map.begin()->first; operator <() local
154 unsigned M0 = Map.begin()->first; operator ==() local
159 unsigned M0 = Map.begin()->first; isSubClassOf() local
165 unsigned M0 = Map.begin()->first; hasStricterSpillThan() local
[all...] |
| /llvm-project/clang/test/Preprocessor/ |
| H A D | bigoutput.c | 8 #define M0 extern int x; macro
|
| /llvm-project/clang/test/CodeGen/ |
| H A D | aarch64-ABI-align-packed-assembly.c | |
| H A D | aarch64-ABI-align-packed.c | |
| /llvm-project/llvm/unittests/IR/ |
| H A D | StructuralHashTest.cpp | 38 std::unique_ptr<Module> M0 = parseIR(Ctx, ""); TEST() local
69 std::unique_ptr<Module> M0 = parseIR(Ctx, ""); TEST() local
|
| H A D | LegacyPassManagerTest.cpp | 388 Module M0("custom-opt-bisect", Context0); in TEST() local
|
| H A D | MetadataTest.cpp | 949 auto *M0 = DILocation::getMergedLocation(A, B); TEST_F() local
|
| /llvm-project/llvm/lib/Target/VE/ |
| H A D | VE.h | 375 inline unsigned M0(unsigned Val) { return Val + 64; } in M0() function
|
| /llvm-project/clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/ |
| H A D | p4.cpp | 15 using M0 = int; typedef
|
| /llvm-project/llvm/unittests/Linker/ |
| H A D | LinkModulesTest.cpp | 266 MDNode *M0 = F->getMetadata("attach"); in TEST_F() local
|
| /llvm-project/llvm/docs/ |
| H A D | AMDGPUUsage.rst | 5721 M0 global() subsubsection
5734 amdgpu-amdhsa-kernel-prolog-stack-pointerM0 global() argument
[all...] |
| /llvm-project/llvm/unittests/FuzzMutate/ |
| H A D | RandomIRBuilderTest.cpp | 377 std::unique_ptr<Module> M0 = parseAssembly(SourceCode, Ctx); TEST() local
|
| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 1055 const MCOperand &M0 = MI.getOperand(OpIdx); getMveAddrModeRQOpValue() local
1075 const MCOperand &M0 = MI.getOperand(OpIdx); getMveAddrModeQOpValue() local
|
| /llvm-project/mlir/python/mlir/dialects/linalg/opdsl/ops/ |
| H A D | core_named_ops.py | 468 lhs=TensorDef(TV.LhsType, Batch, S.M, S.K, S.M0, S.K0), argument
491 batch_mmt4d( lhs=TensorDef(TV.LhsType, Batch, S.M, S.K, S.M0, S.K0), rhs=TensorDef(TV.RhsType, Batch, S.N, S.K, S.N0, S.K0), accum=TensorDef(TV.AccumType, Batch, S.M, S.N, S.M0, S.N0, output=True), ) global() argument
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1085 unsigned M0 = BaseOrd[MaxIF.SrcR], M1 = BaseOrd[MaxIF.InsR]; in pruneCoveredSets() local
|
| H A D | HexagonISelDAGToDAG.cpp | 819 SDValue M0 = CurDAG->getTargetConstant(0x18, dl, MVT::i32); SelectVAlign() local
|
| H A D | HexagonISelLowering.cpp | 2752 SDValue M0 = DAG.getConstant(8 / VecWidth, dl, MVT::i32); extractVectorPred() local
|
| /llvm-project/llvm/unittests/Analysis/ |
| H A D | ScalarEvolutionTest.cpp | 102 auto *M0 = cast<SCEVAddExpr>(P0); in TEST_F() local
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3839 SDValue M0 = peekThroughOneUseTruncation(Mask->getOperand(0)); matchBitExtract() local
3866 SDValue M0 = peekThroughOneUseTruncation(Mask->getOperand(0)); matchBitExtract() local
[all...] |
| H A D | X86ISelLowering.cpp | 3681 int M0 = Mask[i]; canWidenShuffleElements() local
13396 int M0 = Mask[2 * DWord + 0]; lowerV8I16GeneralSingleInputShuffle() local
38415 int M0 = RepeatedMask[Offset]; matchBinaryPermuteShuffle() local
39409 SDValue M0 = GetHOpSrc(ScaledMask[0]); canonicalizeShuffleMaskWithHorizOp() local
39538 int M0 = WideMask64[0]; canonicalizeShuffleMaskWithHorizOp() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1988 __anon0551f3380202(const MergeCandidate* M0, const MergeCandidate *M1) LoadStoreMultipleOpti() argument
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 407 SDValue M0 = Lowering.copyToM0(*CurDAG, N->getOperand(0), SDLoc(N), Val); glueCopyToM0() local
|
| H A D | SIISelLowering.cpp | 7692 SDNode *M0 = DAG.getMachineNode(AMDGPU::SI_INIT_M0, DL, MVT::Other, MVT::Glue, copyToM0() local
8848 SDValue M0 = M->getOperand(2); LowerINTRINSIC_W_CHAIN() local
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2296 unsigned M0 = N->getMaskElt(0) / 4; isXXINSERTWMask() local
2373 unsigned M0 = N->getMaskElt(0) / 4; isXXSLDWIShuffleMask() local
2472 unsigned M0 = N->getMaskElt(0) / 8; isXXPERMDIShuffleMask() local
[all...] |
| /llvm-project/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 6367 auto *M0 = dyn_cast<IntrinsicInst>(Op0); foldMinimumMaximumSharedOp() local
|