Searched defs:LoadOpcode (Results 1 – 8 of 8) sorted by relevance
| /llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaInstrInfo.cpp | 124 unsigned LoadOpcode, StoreOpcode; storeRegToStackSlot() local
138 unsigned LoadOpcode, StoreOpcode; loadRegFromStackSlot() local
144 getLoadStoreOpcodes(const TargetRegisterClass * RC,unsigned & LoadOpcode,unsigned & StoreOpcode,int64_t offset) const getLoadStoreOpcodes() argument
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 233 switch (LoadOpcode) { in getYMMtoXMMLoadOpcode() argument
209 isPotentialBlockingStoreInst(unsigned Opcode,unsigned LoadOpcode) isPotentialBlockingStoreInst() argument
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 999 unsigned LoadOpcode, StoreOpcode; storeRegToStackSlot() local
1016 unsigned LoadOpcode, StoreOpcode; loadRegFromStackSlot() local
1326 unsigned LoadOpcode = Op0IsGPR ? SystemZ::LG : SystemZ::LD; foldMemoryOperandImpl() local
1852 getLoadStoreOpcodes(const TargetRegisterClass * RC,unsigned & LoadOpcode,unsigned & StoreOpcode) const getLoadStoreOpcodes() argument
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 1005 auto LoadOpcode = Size == 4 ? ARM::VLDRS : ARM::VLDRD; in select() local
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| /llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 2321 unsigned LoadOpcode = (Width == 8) ? AVR::LDRdPtr : AVR::LDWRdPtr; insertAtomicArithmeticOp() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 689 unsigned LoadOpcode; generateLoadForNewConst() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 6374 const unsigned LoadOpcode = IsD16 ? AMDGPU::G_AMDGPU_INTRIN_IMAGE_LOAD_D16 legalizeImageIntrinsic() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13455 unsigned LoadOpcode = IsSignedCmp ? ISD::SEXTLOAD : ISD::ZEXTLOAD; foldSextSetcc() local
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