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Searched defs:Lane (Results 1 – 24 of 24) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp418 unsigned Lane, bool QPR) { in createDupLane()
433 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg()
478 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg()
543 unsigned Lane; in optimizeAllLanesPattern() local
H A DARMBaseInstrInfo.cpp4959 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane()
4990 unsigned Lane, unsigned &ImplicitSReg) { in getImplicitSPRUseForDPRUse()
5018 unsigned Lane; in setExecutionDomain() local
H A DARMExpandPseudoInsts.cpp730 unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); in ExpandLaneOp() local
H A DARMISelLowering.cpp8351 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
8547 unsigned Lane = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); in LowerINSERT_VECTOR_ELT_i1() local
8561 SDValue Lane = Op.getOperand(2); in LowerINSERT_VECTOR_ELT() local
8610 unsigned Lane = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); in LowerEXTRACT_VECTOR_ELT_i1() local
8621 SDValue Lane = Op.getOperand(1); in LowerEXTRACT_VECTOR_ELT() local
14407 unsigned Lane = Ext.getConstantOperandVal(1); in PerformExtractEltToVMOVRRD() local
16281 SDValue Lane = N0.getOperand(1); in PerformExtendCombine() local
H A DARMISelDAGToDAG.cpp2388 unsigned Lane = in SelectVLDSTLane() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp1701 auto GetSwizzleSrcs = [](size_t I, const SDValue &Lane) { in LowerBUILD_VECTOR()
1725 auto GetShuffleSrc = [&](const SDValue &Lane) { in LowerBUILD_VECTOR()
1767 const SDValue &Lane = Op->getOperand(I); in LowerBUILD_VECTOR() local
1825 IsLaneConstructed = [&, Swizzled](size_t I, const SDValue &Lane) { in LowerBUILD_VECTOR()
1854 const SDValue &Lane = Op->getOperand(I); in LowerBUILD_VECTOR() local
1866 IsLaneConstructed = [&](size_t, const SDValue &Lane) { in LowerBUILD_VECTOR()
1872 for (const SDValue &Lane : Op->op_values()) { in LowerBUILD_VECTOR() local
1882 IsLaneConstructed = [&IsConstant](size_t _, const SDValue &Lane) { in LowerBUILD_VECTOR()
1898 IsLaneConstructed = [&SplatValue](size_t _, const SDValue &Lane) { in LowerBUILD_VECTOR()
1908 const SDValue &Lane = Op->getOperand(I); in LowerBUILD_VECTOR() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp301 static bool matchDupFromInsertVectorElt(int Lane, MachineInstr &MI, in matchDupFromInsertVectorElt()
340 static bool matchDupFromBuildVector(int Lane, MachineInstr &MI, in matchDupFromBuildVector()
362 int Lane = *MaybeLane; in matchDup() local
703 auto Lane = B.buildConstant(LLT::scalar(64), MatchInfo.second); in applyDupLane() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp925 OperandData &getData(unsigned OpIdx, unsigned Lane) { in getData()
938 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; in clearUsed() local
944 void swap(unsigned OpIdx1, unsigned OpIdx2, unsigned Lane) { in swap()
1186 getBestOperand(unsigned OpIdx, int Lane, int LastLane, in getBestOperand()
1263 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; in getBestLaneToStartReordering() local
1304 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in appendOperandsOfVL() local
1344 bool shouldBroadcast(Value *Op, unsigned OpIdx, unsigned Lane) { in shouldBroadcast()
1382 for (unsigned Lane = 0, Lanes = getNumLanes(); Lane != Lanes; ++Lane) in getVL() local
1454 int Lane = FirstLane + Direction * Distance; in reorder() local
1676 for (unsigned Lane = 0, E = Scalars.size(); Lane != E; ++Lane) in setOperand() local
[all …]
H A DVPlan.cpp243 Value *Lane = Instance.Lane.getAsRuntimeExpr(Builder, VF); in get() local
478 for (unsigned Lane = 0, VF = State->VF.getKnownMinValue(); Lane < VF; in execute() local
1131 for (unsigned Lane = 0; Lane < VF.getKnownMinValue(); ++Lane) in execute() local
H A DVPlanSLP.cpp321 for (unsigned Lane = 1, E = MultiNodeOps[0].second.size(); Lane < E; ++Lane) { in reorderMultiNodeOps() local
H A DVPlan.h123 VPLane(unsigned Lane, Kind LaneKind) : Lane(Lane), LaneKind(LaneKind) {} in VPLane()
181 VPLane Lane; member
H A DLoopVectorize.cpp2359 unsigned Part, unsigned Lane) { in recordVectorLoopValueForInductionCast()
2614 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { in buildScalarSteps() local
4546 VPLane Lane = VPLane::getFirstLane(); in fixLCSSAPHIs() local
4860 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { in widenPHIInstruction() local
9523 for (unsigned Lane = 0; Lane < EndLane; ++Lane) in execute() local
9533 unsigned Lane = State.Instance->Lane.getKnownLane(); in execute() local
9715 for (unsigned Lane = 0; Lane < VF.getKnownMinValue(); ++Lane) in get() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp445 for (int Lane = 0; Lane < LaneCount; Lane++) in createShuffleStride() local
617 int Lane = (VectorWidth / 128 > 0) ? VectorWidth / 128 : 1; in group2Shuffle() local
H A DX86InstCombineIntrinsic.cpp492 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in simplifyX86pack() local
1964 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in simplifyDemandedVectorEltsIntrinsic() local
1979 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in simplifyDemandedVectorEltsIntrinsic() local
H A DX86ISelLowering.cpp6903 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in createPackShuffleMask() local
6926 for (int Lane = 0; Lane != NumLanes; ++Lane) { in getPackDemandedElts() local
10920 int Lane = (M % NumElts) / NumEltsPerLane; in isMultiLaneShuffleMask() local
12261 for (int Lane = 0; Lane != NumElts; Lane += NumLaneElts) { in lowerShuffleAsUNPCKAndPermute() local
12290 for (int Lane = 0; Lane != NumElts; Lane += NumLaneElts) { in lowerShuffleAsUNPCKAndPermute() local
12333 for (int Lane = 0; Lane != NumElts; Lane += NumEltsPerLane) { in lowerShuffleAsByteRotateAndPermute() local
12373 for (int Lane = 0; Lane != NumElts; Lane += NumEltsPerLane) { in lowerShuffleAsByteRotateAndPermute() local
16165 for (int Lane = 0; Lane != NumLanes; ++Lane) { in lowerShuffleAsLanePermuteAndRepeatedMask() local
16237 for (int Lane = 0; Lane != NumLanes; ++Lane) { in lowerShuffleAsLanePermuteAndRepeatedMask() local
16267 for (int Lane = 0; Lane != NumLanes; ++Lane) { in lowerShuffleAsLanePermuteAndRepeatedMask() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DInterleavedAccessPass.cpp231 unsigned Lane = J * Factor + I; in isReInterleaveMask() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3176 unsigned Lane = MI.getOperand(2).getImm(); in emitCOPY_FW() local
3221 unsigned Lane = MI.getOperand(2).getImm() * 2; in emitCOPY_FD() local
3251 unsigned Lane = MI.getOperand(2).getImm(); in emitINSERT_FW() local
3287 unsigned Lane = MI.getOperand(2).getImm(); in emitINSERT_FD() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp920 int Index, unsigned Lane, in spillVGPRtoAGPR()
1162 unsigned Lane = RegOffset / 4; in buildSpillLoadStore() local
H A DSIISelLowering.cpp10966 unsigned Lane = 0; in adjustWritemask() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp8842 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, dl, MVT::i64); in GeneratePerfectShuffle() local
8948 static SDValue constructDup(SDValue V, int Lane, SDLoc dl, EVT VT, in constructDup()
9023 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
9044 unsigned Lane = 0; in LowerVECTOR_SHUFFLE() local
9663 for (SDValue Lane : Op->ops()) { in NormalizeBuildVector() local
9891 SDValue Lane = Value.getOperand(1); in LowerBUILD_VECTOR() local
13190 SDValue Lane = Op1.getOperand(1); in tryCombineFixedPointConvert() local
14698 SDValue Lane; in performPostLD1Combine() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DConstantFolding.cpp2856 SmallVector<Constant *, 4> Lane(Operands.size()); in ConstantFoldFixedVectorCall() local
/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DCGBuiltin.cpp7818 int Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); in EmitARMBuiltinExpr() local
8031 llvm::Value *Lane = llvm::ConstantInt::get(T, Value); in ARMMVEConstantSplat() local
17199 Value *Lane = llvm::ConstantInt::get(getLLVMContext(), LaneConst); in EmitWebAssemblyBuiltinExpr() local
17226 Value *Lane = llvm::ConstantInt::get(getLLVMContext(), LaneConst); in EmitWebAssemblyBuiltinExpr() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp6625 int64_t Lane[LANE_NUM]; in parseSwizzleQuadPerm() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1719 const int Lane = SVN->getSplatIndex(); in lowerVECTOR_SHUFFLE() local