| /llvm-project/libc/AOR_v20.02/string/arm/ |
| H A D | strcmp.S | 39 #define LSB 0xff000000 macro
53 #define LSB 0x000000ff macro
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| /llvm-project/libc/test/src/__support/CPP/ |
| H A D | bit_test.cpp | 39 constexpr auto LSB = T(1); TYPED_TEST() local
|
| /llvm-project/llvm/include/llvm/ADT/ |
| H A D | StringExtras.h | 209 tryGetHexFromNibbles(char MSB,char LSB,uint8_t & Hex) tryGetHexFromNibbles() argument
221 hexFromNibbles(char MSB,char LSB) hexFromNibbles() argument
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| /llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 54 const MCOperand &LSB = MI.getOperand(Idx + 1); in getImmOpValueMSBSize() local
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| /llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 222 int LSB = (BitWidth - ImmR) % BitWidth; printInst() local
236 int LSB = (BitWidth - ImmR) % BitWidth; printInst() local
251 int LSB = ImmR; printInst() local
|
| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 2156 buildSbfx(const DstOp & Dst,const SrcOp & Src,const SrcOp & LSB,const SrcOp & Width) buildSbfx() argument
2162 buildUbfx(const DstOp & Dst,const SrcOp & Src,const SrcOp & LSB,const SrcOp & Width) buildUbfx() argument
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2348 isBitfieldExtractOpFromAnd(SelectionDAG * CurDAG,SDNode * N,unsigned & Opc,SDValue & Opd0,unsigned & LSB,unsigned & MSB,unsigned NumberOfIgnoredLowBits,bool BiggerPattern) isBitfieldExtractOpFromAnd() argument
2474 isSeveralBitsExtractOpFromShr(SDNode * N,unsigned & Opc,SDValue & Opd0,unsigned & LSB,unsigned & MSB) isSeveralBitsExtractOpFromShr() argument
2800 uint64_t LSB = Imm; getUsefulBitsFromBFM() local
2817 uint64_t LSB = UsefulBits.getBitWidth() - Imm; getUsefulBitsFromBFM() local
3194 int LSB = llvm::countr_one(NotKnownZero); tryBitfieldInsertOpFromOrAndImm() local
3550 unsigned LSB = llvm::countr_zero(Mask1Imm); tryBitfieldInsertOpFromOr() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 3365 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp() local
3412 int LSB = Srl_imm - Shl_imm; tryV6T2BitfieldExtractOp() local
3430 unsigned LSB = llvm::countr_zero(And_imm); tryV6T2BitfieldExtractOp() local
3450 unsigned LSB = 0; tryV6T2BitfieldExtractOp() local
[all...] |
| H A D | ARMISelLowering.cpp | 6542 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); LowerCTTZ() local
14647 unsigned LSB = llvm::countr_zero(Mask); PerformORCombineToBFI() local
14936 unsigned LSB = llvm::countr_zero(~InvMask); PerformBFICombine() local
[all...] |
| /llvm-project/compiler-rt/lib/ubsan/ |
| H A D | ubsan_handlers.cpp | 167 uptr LSB = LeastSignificantSetBitIndex(RealPointer); in handleAlignmentAssumptionImpl() local
|
| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 1980 unsigned LSB, Length; isRxSBGMask() local
|
| /llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 933 unsigned LSB; member
3783 CreateBitfield(unsigned LSB,unsigned Width,SMLoc S,SMLoc E,ARMAsmParser & Parser) CreateBitfield() argument
5620 int64_t LSB = CE->getValue(); parseBitfield() local
8042 unsigned LSB = Inst.getOperand(2).getImm(); validateInstruction() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2537 auto LSB = Cst1->Value.getZExtValue(); select() local
2777 unsigned LSB = I.getOperand(3).getImm(); select() local
|
| /llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 6259 uint64_t LSB = LSBCE->getValue(); MatchAndEmitInstruction() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 7111 auto LSB = B.buildConstant(S32, 25); legalizeWaveID() local
|
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 18360 if (const LSBaseSDNode *LSB = dyn_cast<LSBaseSDNode>(Parent)) computeMOFlags() local
|