1 /* $NetBSD: lpt_pccreg.h,v 1.4 2008/04/28 20:23:29 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * MVME147 Parallel Port Register Definitions 34 */ 35 #ifndef _MVME68K_LPT_PCCREG_H 36 #define _MVME68K_LPT_PCCREG_H 37 38 /* 39 * The mvme147's PCC chip has two status/control registers for the 40 * printer port: 41 * 42 * PCCREG_PRNT_INTR_CTRL Printer interrupt control register 43 * 0 - 2 Interrupt Level 44 * 3 Interrupt Enable 45 * 4 ACK Polarity. If set, falling edge of ACK generates 46 * the interrupt. If clear, rising edge of ACK generates 47 * the interrupt. 48 * 5 Indicates an ACK interrupt in progress. Cleared by 49 * writing a one, or disabling lpt interrupts. 50 * 6 Indicates a FAULT interrupt. Set on falling edge 51 * of printer's fault signal. Cleared by writing a one. 52 * 7 Printer Interrupt in progress. Basically just the 53 * logical OR of bits 5 and 6. 54 */ 55 #define LPI_ENABLE (1 << 3) 56 #define LPI_ACKPOL (1 << 4) 57 #define LPI_ACKINT (1 << 5) 58 #define LPI_FAULTINT (1 << 6) 59 #define LPI_INTERRUPT (1 << 7) 60 61 62 /* 63 * PCCREG_PRNT_CONTROL Printer Control Register 64 * 0 Selects auto or manual strobe mode. When low, strobe 65 * is automatically generated by a write to the printer 66 * data register. When set, strobe must be generated 67 * manually using bit 2 of this register. 68 * 1 Controls strobe timing in auto mode. When low, strobe 69 * time is 6.4uS. When high, strobe time is 1.6uS. 70 * 2 Controls strobe in manual mode. 71 * 3 Control Input Prime signal. When set, Input Prime 72 * is activated. 73 * 74 * Two other registers which are not addressed via the global PCC structure, 75 * live at 0xfffe2800. This address is virtualised and passed to the driver 76 * in the pcc_attach_args structure: 77 */ 78 #define LPC_STROBE_MODE (1 << 0) 79 #define LPC_FAST_STROBE (1 << 1) 80 #define LPC_STROBE (1 << 2) 81 #define LPC_INPUT_PRIME (1 << 3) 82 83 #define lpt_control_read() pcc_reg_read(sys_pcc, PCCREG_PRNT_CONTROL) 84 #define lpt_control_write(v) pcc_reg_write(sys_pcc, PCCREG_PRNT_CONTROL, v) 85 86 /* 87 * Data and status registers appear at the same offset. 88 * Write to access the data register. Read to access the status register. 89 */ 90 #define LPREG_DATA 0x00 /* Write only data register */ 91 #define LPREG_STATUS 0x00 /* Read only status register */ 92 93 #define LPREG_SIZE 0x1 94 95 /* 96 * Access macros for the status register 97 */ 98 #define LPS_BUSY (1 << 3) 99 #define LPS_PAPER_EMPTY (1 << 4) 100 #define LPS_SELECT (1 << 5) 101 #define LPS_FAULT (1 << 6) 102 #define LPS_ACK (1 << 7) 103 104 #define lpt_data_write(sc,v) \ 105 bus_space_write_1((sc)->sc_bust, (sc)->sc_bush, LPREG_DATA, (v)) 106 #define lpt_status_read(sc) \ 107 bus_space_read_1((sc)->sc_bust, (sc)->sc_bush, LPREG_STATUS) 108 109 #endif /* _MVME68K_LPT_PCCREG_H */ 110