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Searched defs:LIS (Results 1 – 25 of 54) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp103 LiveIntervals &LIS) { in convertImplicitDefToConstZero()
268 const LiveIntervals &LIS) { in getVRegDef()
285 MachineDominatorTree &MDT, LiveIntervals &LIS) { in hasOneUse()
434 LiveIntervals &LIS, in oneUseDominatesOtherUses()
504 static void shrinkToUses(LiveInterval &LI, LiveIntervals &LIS) { in shrinkToUses()
515 MachineInstr *Insert, LiveIntervals &LIS, in moveForSingleUse()
560 MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, in rematerializeCheapDef()
628 MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, in moveAndTeeForMultiUse()
809 auto &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
H A DWebAssemblyMemIntrinsicResults.cpp88 LiveIntervals &LIS) { in replaceDominatedUses()
151 MachineDominatorTree &MDT, LiveIntervals &LIS, in optimizeCall()
189 auto &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
H A DWebAssemblyOptimizeLiveIntervals.cpp75 auto &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DCalcSpillWeights.h48 LiveIntervals &LIS; variable
58 VirtRegAuxInfo(MachineFunction &MF, LiveIntervals &LIS, in VirtRegAuxInfo()
H A DModuloSchedule.h173 LiveIntervals &LIS; variable
262 LiveIntervals &LIS, InstrChangesTy InstrChanges) in ModuloScheduleExpander()
282 LiveIntervals *LIS) in PeelingModuloScheduleExpander()
298 LiveIntervals *LIS; variable
H A DLiveRegMatrix.h42 LiveIntervals *LIS; variable
H A DLiveRangeEdit.h74 LiveIntervals &LIS; variable
H A DRegAllocPBQP.h140 LiveIntervals &LIS, in GraphMetadata()
145 LiveIntervals &LIS; variable
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DRegAllocPBQP.cpp193 LiveIntervals &LIS = G.getMetadata().LIS; in apply() local
310 LiveIntervals &LIS = G.getMetadata().LIS; in apply() local
529 PBQPVirtRegAuxInfo(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, in PBQPVirtRegAuxInfo()
568 LiveIntervals &LIS) { in findVRegIntervalsToAlloc()
594 LiveIntervals &LIS = G.getMetadata().LIS; in initializeGraph() local
692 MachineFunction &MF, LiveIntervals &LIS, in spillVReg()
721 LiveIntervals &LIS = G.getMetadata().LIS; in mapPBQPToRegAlloc() local
756 LiveIntervals &LIS, in finalizeAlloc()
783 void RegAllocPBQP::postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS) { in postOptimization()
794 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
H A DLiveDebugVariables.cpp535 LiveIntervals *LIS; member in __anonfbf3834f0411::LDVImpl
921 LiveIntervals &LIS) { in extendDef()
975 MachineRegisterInfo &MRI, LiveIntervals &LIS) { in addDefsFromCopies()
1062 LiveIntervals &LIS, LexicalScopes &LS) { in computeIntervals()
1271 LiveIntervals& LIS) { in splitLocation()
1371 LiveIntervals &LIS) { in splitRegister()
1400 splitRegister(Register OldReg, ArrayRef<Register> NewRegs, LiveIntervals &LIS) { in splitRegister()
1485 findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, LiveIntervals &LIS, in findInsertLocation()
1533 LiveIntervals &LIS, const TargetRegisterInfo &TRI) { in findNextInsertLocation()
1560 LiveIntervals &LIS, const TargetInstrInfo &TII, in insertDebugValue()
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H A DRegAllocBase.h67 LiveIntervals *LIS = nullptr; variable
H A DSplitKit.h101 const LiveIntervals &LIS; variable
269 LiveIntervals &LIS; variable
H A DRegisterPressure.cpp237 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { in getLiveRange()
422 getLanesWithProperty(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, in getLanesWithProperty()
450 static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS, in getLiveLanesAt()
582 const LiveIntervals &LIS) { in detectDeadDefs()
601 void RegisterOperands::adjustLaneLiveness(const LiveIntervals &LIS, in adjustLaneLiveness()
1227 const LiveIntervals *LIS) { in findUseBetween()
H A DInlineSpiller.cpp88 LiveIntervals &LIS; member in __anonf47227990111::HoistSpillHelper
161 LiveIntervals &LIS; member in __anonf47227990111::InlineSpiller
276 static void getVDefInterval(const MachineInstr &MI, LiveIntervals &LIS) { in getVDefInterval()
784 LiveIntervals const &LIS, in dumpMachineInstrRangeWithSlotIndex()
H A DInterferenceCache.h63 LiveIntervals *LIS = nullptr; variable
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp24 const LiveIntervals &LIS, in printLivesAt()
201 const LiveIntervals &LIS) { in getUsedRegMask()
219 collectVirtualRegUses(const MachineInstr &MI, const LiveIntervals &LIS, in collectVirtualRegUses()
246 const LiveIntervals &LIS, in getLiveLaneMask()
264 const LiveIntervals &LIS, in getLiveRegs()
H A DGCNRegPressure.h212 getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS) { in getLiveRegMap()
250 const LiveIntervals &LIS) { in getLiveRegsAfter()
256 const LiveIntervals &LIS) { in getLiveRegsBefore()
H A DSILowerSGPRSpills.cpp45 LiveIntervals *LIS = nullptr; member in __anon4b7445d60111::SILowerSGPRSpills
83 LiveIntervals *LIS) { in insertCSRSaves()
123 LiveIntervals *LIS) { in insertCSRRestores()
H A DSIOptimizeExecMaskingPreRA.cpp33 LiveIntervals *LIS; member in __anonb4c9c4b40111::SIOptimizeExecMaskingPreRA
91 LiveIntervals *LIS, Register Reg, in isDefBetween()
H A DSIPreAllocateWWMRegs.cpp35 LiveIntervals *LIS; member in __anon62c696f20111::SIPreAllocateWWMRegs
H A DGCNIterativeScheduler.cpp47 const LiveIntervals *LIS, in printRegion()
78 const LiveIntervals *LIS) { in printLivenessInfo()
H A DGCNNSAReassign.cpp75 LiveIntervals *LIS; member in __anon85ea4db40111::GCNNSAReassign
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCTLSDynamicCall.cpp46 LiveIntervals *LIS; member
H A DPPCVSXFMAMutate.cpp67 LiveIntervals *LIS; member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86TileConfig.cpp84 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); in INITIALIZE_PASS_DEPENDENCY() local

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