| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 101 convertImplicitDefToConstZero(MachineInstr * MI,MachineRegisterInfo & MRI,const TargetInstrInfo * TII,MachineFunction & MF,LiveIntervals & LIS) convertImplicitDefToConstZero() argument
266 getVRegDef(unsigned Reg,const MachineInstr * Insert,const MachineRegisterInfo & MRI,const LiveIntervals & LIS) getVRegDef() argument
284 hasOneNonDBGUse(unsigned Reg,MachineInstr * Def,MachineRegisterInfo & MRI,MachineDominatorTree & MDT,LiveIntervals & LIS) hasOneNonDBGUse() argument
438 oneUseDominatesOtherUses(unsigned Reg,const MachineOperand & OneUse,const MachineBasicBlock & MBB,const MachineRegisterInfo & MRI,const MachineDominatorTree & MDT,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI) oneUseDominatesOtherUses() argument
511 shrinkToUses(LiveInterval & LI,LiveIntervals & LIS) shrinkToUses() argument
522 moveForSingleUse(unsigned Reg,MachineOperand & Op,MachineInstr * Def,MachineBasicBlock & MBB,MachineInstr * Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI) moveForSingleUse() argument
571 rematerializeCheapDef(unsigned Reg,MachineOperand & Op,MachineInstr & Def,MachineBasicBlock & MBB,MachineBasicBlock::instr_iterator Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI,const WebAssemblyInstrInfo * TII,const WebAssemblyRegisterInfo * TRI) rematerializeCheapDef() argument
634 moveAndTeeForMultiUse(unsigned Reg,MachineOperand & Op,MachineInstr * Def,MachineBasicBlock & MBB,MachineInstr * Insert,LiveIntervals & LIS,WebAssemblyFunctionInfo & MFI,MachineRegisterInfo & MRI,const WebAssemblyInstrInfo * TII) moveAndTeeForMultiUse() argument
815 auto &LIS = getAnalysis<LiveIntervals>(); runOnMachineFunction() local
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| H A D | WebAssemblyMemIntrinsicResults.cpp | 88 LiveIntervals &LIS) { in replaceDominatedUses() argument
150 MachineDominatorTree &MDT, LiveIntervals &LIS, in optimizeCall() argument
188 auto &LIS in runOnMachineFunction() local
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| H A D | WebAssemblyOptimizeLiveIntervals.cpp | 80 auto &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS(); in runOnMachineFunction() local
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| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CalcSpillWeights.h | 47 LiveIntervals &LIS; variable
57 VirtRegAuxInfo(MachineFunction &MF, LiveIntervals &LIS, in VirtRegAuxInfo()
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| H A D | ModuloSchedule.h | 175 LiveIntervals &LIS; variable
266 LiveIntervals &LIS, InstrChangesTy InstrChanges) in ModuloScheduleExpander() argument
286 LiveIntervals *LIS) in PeelingModuloScheduleExpander() argument
302 LiveIntervals *LIS = nullptr; variable
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| H A D | LiveRegMatrix.h | 42 LiveIntervals *LIS = nullptr; variable
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| H A D | LiveRangeEdit.h | 70 LiveIntervals &LIS; variable
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| H A D | RegAllocPBQP.h | 140 LiveIntervals &LIS, in GraphMetadata() argument
145 LiveIntervals &LIS; variable
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegAllocPBQP.cpp | 193 LiveIntervals &LIS = G.getMetadata().LIS; in apply() local
310 LiveIntervals &LIS = G.getMetadata().LIS; in apply() local
529 PBQPVirtRegAuxInfo(MachineFunction & MF,LiveIntervals & LIS,VirtRegMap & VRM,const MachineLoopInfo & Loops,const MachineBlockFrequencyInfo & MBFI) PBQPVirtRegAuxInfo() argument
568 findVRegIntervalsToAlloc(const MachineFunction & MF,LiveIntervals & LIS) findVRegIntervalsToAlloc() argument
594 LiveIntervals &LIS = G.getMetadata().LIS; initializeGraph() local
692 spillVReg(Register VReg,SmallVectorImpl<Register> & NewIntervals,MachineFunction & MF,LiveIntervals & LIS,VirtRegMap & VRM,Spiller & VRegSpiller) spillVReg() argument
721 LiveIntervals &LIS = G.getMetadata().LIS; mapPBQPToRegAlloc() local
756 finalizeAlloc(MachineFunction & MF,LiveIntervals & LIS,VirtRegMap & VRM) const finalizeAlloc() argument
783 postOptimization(Spiller & VRegSpiller,LiveIntervals & LIS) postOptimization() argument
794 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); runOnMachineFunction() local
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| H A D | LiveDebugVariables.cpp | 536 LiveIntervals *LIS; global() member in __anonfeb821960411::LDVImpl
965 extendDef(SlotIndex Idx,DbgVariableValue DbgValue,SmallDenseMap<unsigned,std::pair<LiveRange *,const VNInfo * >> & LiveIntervalInfo,std::optional<std::pair<SlotIndex,SmallVector<unsigned>>> & Kills,LiveIntervals & LIS) extendDef() argument
1019 addDefsFromCopies(DbgVariableValue DbgValue,SmallVectorImpl<std::pair<unsigned,LiveInterval * >> & LocIntervals,SlotIndex KilledAt,SmallVectorImpl<std::pair<SlotIndex,DbgVariableValue>> & NewDefs,MachineRegisterInfo & MRI,LiveIntervals & LIS) addDefsFromCopies() argument
1105 computeIntervals(MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI,LiveIntervals & LIS,LexicalScopes & LS) computeIntervals() argument
1334 splitLocation(unsigned OldLocNo,ArrayRef<Register> NewRegs,LiveIntervals & LIS) splitLocation() argument
1434 splitRegister(Register OldReg,ArrayRef<Register> NewRegs,LiveIntervals & LIS) splitRegister() argument
1506 splitRegister(Register OldReg,ArrayRef<Register> NewRegs,LiveIntervals & LIS) splitRegister() argument
1590 findInsertLocation(MachineBasicBlock * MBB,SlotIndex Idx,LiveIntervals & LIS,BlockSkipInstsMap & BBSkipInstsMap) findInsertLocation() argument
1638 findNextInsertLocation(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,SlotIndex StopIdx,ArrayRef<MachineOperand> LocMOs,LiveIntervals & LIS,const TargetRegisterInfo & TRI) findNextInsertLocation() argument
1665 insertDebugValue(MachineBasicBlock * MBB,SlotIndex StartIdx,SlotIndex StopIdx,DbgVariableValue DbgValue,ArrayRef<bool> LocSpills,ArrayRef<unsigned> SpillOffsets,LiveIntervals & LIS,const TargetInstrInfo & TII,const TargetRegisterInfo & TRI,BlockSkipInstsMap & BBSkipInstsMap) insertDebugValue() argument
1734 insertDebugLabel(MachineBasicBlock * MBB,SlotIndex Idx,LiveIntervals & LIS,const TargetInstrInfo & TII,BlockSkipInstsMap & BBSkipInstsMap) insertDebugLabel() argument
1743 emitDebugValues(VirtRegMap * VRM,LiveIntervals & LIS,const TargetInstrInfo & TII,const TargetRegisterInfo & TRI,const SpillOffsetMap & SpillOffsets,BlockSkipInstsMap & BBSkipInstsMap) emitDebugValues() argument
1799 emitDebugLabel(LiveIntervals & LIS,const TargetInstrInfo & TII,BlockSkipInstsMap & BBSkipInstsMap) emitDebugLabel() argument
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| H A D | RegAllocBase.h | 68 LiveIntervals *LIS = nullptr; global() variable
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| H A D | SplitKit.h | 100 const LiveIntervals &LIS; variable
265 LiveIntervals &LIS; variable
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| H A D | RegAllocPriorityAdvisor.h | 39 LiveIntervals *const LIS; variable
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| H A D | RegisterPressure.cpp | 237 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { in getLiveRange() argument
421 getLanesWithProperty(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, in getLanesWithProperty() argument
449 getLiveLanesAt(const LiveIntervals & LIS,const MachineRegisterInfo & MRI,bool TrackLaneMasks,Register RegUnit,SlotIndex Pos) getLiveLanesAt() argument
579 detectDeadDefs(const MachineInstr & MI,const LiveIntervals & LIS) detectDeadDefs() argument
598 adjustLaneLiveness(const LiveIntervals & LIS,const MachineRegisterInfo & MRI,SlotIndex Pos,MachineInstr * AddFlagsMI) adjustLaneLiveness() argument
1224 findUseBetween(unsigned Reg,LaneBitmask LastUseMask,SlotIndex PriorUseIdx,SlotIndex NextUseIdx,const MachineRegisterInfo & MRI,const LiveIntervals * LIS) findUseBetween() argument
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| H A D | RegAllocEvictionAdvisor.h | 140 LiveIntervals *const LIS; variable
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| H A D | InlineSpiller.cpp | 310 static void getVDefInterval(const MachineInstr &MI, LiveIntervals &LIS) { in getVDefInterval() argument
84 LiveIntervals &LIS; global() member in __anon9231fd800111::HoistSpillHelper
153 LiveIntervals &LIS; global() member in __anon9231fd800111::InlineSpiller
852 dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B,MachineBasicBlock::iterator E,LiveIntervals const & LIS,const char * const header,Register VReg=Register ()) dumpMachineInstrRangeWithSlotIndex() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerSGPRSpills.cpp | 39 LiveIntervals *LIS = nullptr; member in __anondd69e87d0111::SILowerSGPRSpills
88 LiveIntervals *LIS) { in insertCSRSaves() argument
131 SlotIndexes *Indexes, LiveIntervals *LIS) { in insertCSRRestores() argument
263 extendWWMVirtRegLiveness(MachineFunction & MF,LiveIntervals * LIS) extendWWMVirtRegLiveness() argument
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| H A D | GCNRegPressure.cpp | 171 collectVirtualRegUses(SmallVectorImpl<RegisterMaskPair> & RegMaskPairs,const MachineInstr & MI,const LiveIntervals & LIS,const MachineRegisterInfo & MRI) collectVirtualRegUses() argument
207 getLiveLaneMask(unsigned Reg,SlotIndex SI,const LiveIntervals & LIS,const MachineRegisterInfo & MRI) getLiveLaneMask() argument
228 getLiveRegs(SlotIndex SI,const LiveIntervals & LIS,const MachineRegisterInfo & MRI) getLiveRegs() argument
515 getRegLiveThroughMask(const MachineRegisterInfo & MRI,const LiveIntervals & LIS,Register Reg,SlotIndex Begin,SlotIndex End,LaneBitmask Mask=LaneBitmask::getAll ()) getRegLiveThroughMask() argument
543 const LiveIntervals &LIS = getAnalysis<LiveIntervals>(); runOnMachineFunction() local
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| H A D | GCNRegPressure.h | 268 getLiveRegMap(Range && R,bool After,LiveIntervals & LIS) getLiveRegMap() argument
306 getLiveRegsAfter(const MachineInstr & MI,const LiveIntervals & LIS) getLiveRegsAfter() argument
312 getLiveRegsBefore(const MachineInstr & MI,const LiveIntervals & LIS) getLiveRegsBefore() argument
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| H A D | AMDGPUMarkLastScratchLoad.cpp | 31 LiveIntervals *LIS = nullptr; member in __anon2e8ff78a0111::AMDGPUMarkLastScratchLoad
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| H A D | SILowerWWMCopies.cpp | 54 LiveIntervals *LIS; member in __anonb835ee080111::SILowerWWMCopies
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 33 LiveIntervals *LIS; member in __anon9d1a533b0111::SIOptimizeExecMaskingPreRA
91 LiveIntervals *LIS, Register Reg, in isDefBetween() argument
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| H A D | GCNPreRAOptimizations.cpp | 45 LiveIntervals *LIS; member in __anonc1c976910111::GCNPreRAOptimizations
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| H A D | SIPreAllocateWWMRegs.cpp | 42 LiveIntervals *LIS; member in __anon05cc8c390111::SIPreAllocateWWMRegs
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TileConfig.cpp | 84 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); INITIALIZE_PASS_DEPENDENCY() local
|