1 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu. 2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 3 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to 19 the Free Software Foundation, 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22 /* Things to do: 23 - longlong.h? 24 */ 25 26 #undef SWITCH_TAKES_ARG 27 #undef WORD_SWITCH_TAKES_ARG 28 #undef HANDLE_SYSV_PRAGMA 29 #undef SIZE_TYPE 30 #undef PTRDIFF_TYPE 31 #undef WCHAR_TYPE 32 #undef WCHAR_TYPE_SIZE 33 #undef ASM_FILE_START 34 #undef ASM_OUTPUT_EXTERNAL_LIBCALL 35 #undef TARGET_VERSION 36 #undef CPP_SPEC 37 #undef ASM_SPEC 38 #undef LINK_SPEC 39 #undef STARTFILE_SPEC 40 #undef ENDFILE_SPEC 41 #undef SUBTARGET_SWITCHES 42 43 44 /* M32R/X overrides. */ 45 /* Print subsidiary information on the compiler version in use. */ 46 #define TARGET_VERSION fprintf (stderr, " (m32r/x)"); 47 48 /* Additional flags for the preprocessor. */ 49 #define CPP_CPU_SPEC "%{m32rx:-D__M32RX__} %{m32r:-U__M32RX__}" 50 51 /* Assembler switches. */ 52 #define ASM_CPU_SPEC \ 53 "%{m32r} %{m32rx} %{!O0: %{O*: -O}} --no-warn-explicit-parallel-conflicts" 54 55 /* Use m32rx specific crt0/crtinit/crtfini files. */ 56 #define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}" 57 #define ENDFILE_CPU_SPEC "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}" 58 59 /* Extra machine dependent switches. */ 60 #define SUBTARGET_SWITCHES \ 61 { "32rx", TARGET_M32RX_MASK, "Compile for the m32rx" }, \ 62 { "32r", -TARGET_M32RX_MASK, "" }, 63 64 /* Define this macro as a C expression for the initializer of an array of 65 strings to tell the driver program which options are defaults for this 66 target and thus do not need to be handled specially when using 67 `MULTILIB_OPTIONS'. */ 68 #define SUBTARGET_MULTILIB_DEFAULTS , "m32r" 69 70 /* Number of additional registers the subtarget defines. */ 71 #define SUBTARGET_NUM_REGISTERS 1 72 73 /* 1 for registers that cannot be allocated. */ 74 #define SUBTARGET_FIXED_REGISTERS , 1 75 76 /* 1 for registers that are not available across function calls. */ 77 #define SUBTARGET_CALL_USED_REGISTERS , 1 78 79 /* Order to allocate model specific registers. */ 80 #define SUBTARGET_REG_ALLOC_ORDER , 19 81 82 /* Registers which are accumulators. */ 83 #define SUBTARGET_REG_CLASS_ACCUM 0x80000 84 85 /* All registers added. */ 86 #define SUBTARGET_REG_CLASS_ALL SUBTARGET_REG_CLASS_ACCUM 87 88 /* Additional accumulator registers. */ 89 #define SUBTARGET_ACCUM_P(REGNO) ((REGNO) == 19) 90 91 /* Define additional register names. */ 92 #define SUBTARGET_REGISTER_NAMES , "a1" 93 /* end M32R/X overrides. */ 94 95 /* Print subsidiary information on the compiler version in use. */ 96 #ifndef TARGET_VERSION 97 #define TARGET_VERSION fprintf (stderr, " (m32r)") 98 #endif 99 100 /* Switch Recognition by gcc.c. Add -G xx support */ 101 102 #undef SWITCH_TAKES_ARG 103 #define SWITCH_TAKES_ARG(CHAR) \ 104 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') 105 106 /* Names to predefine in the preprocessor for this target machine. */ 107 /* __M32R__ is defined by the existing compiler so we use that. */ 108 #define CPP_PREDEFINES "-Acpu=m32r -Amachine=m32r -D__M32R__" 109 110 /* This macro defines names of additional specifications to put in the specs 111 that can be used in various specifications like CC1_SPEC. Its definition 112 is an initializer with a subgrouping for each command option. 113 114 Each subgrouping contains a string constant, that defines the 115 specification name, and a string constant that used by the GNU CC driver 116 program. 117 118 Do not define this macro if it does not need to do anything. */ 119 120 #ifndef SUBTARGET_EXTRA_SPECS 121 #define SUBTARGET_EXTRA_SPECS 122 #endif 123 124 #ifndef ASM_CPU_SPEC 125 #define ASM_CPU_SPEC "" 126 #endif 127 128 #ifndef CPP_CPU_SPEC 129 #define CPP_CPU_SPEC "" 130 #endif 131 132 #ifndef CC1_CPU_SPEC 133 #define CC1_CPU_SPEC "" 134 #endif 135 136 #ifndef LINK_CPU_SPEC 137 #define LINK_CPU_SPEC "" 138 #endif 139 140 #ifndef STARTFILE_CPU_SPEC 141 #define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} crtinit.o%s" 142 #endif 143 144 #ifndef ENDFILE_CPU_SPEC 145 #define ENDFILE_CPU_SPEC "-lgloss crtfini.o%s" 146 #endif 147 148 #ifndef RELAX_SPEC 149 #if 0 /* not supported yet */ 150 #define RELAX_SPEC "%{mrelax:-relax}" 151 #else 152 #define RELAX_SPEC "" 153 #endif 154 #endif 155 156 #define EXTRA_SPECS \ 157 { "asm_cpu", ASM_CPU_SPEC }, \ 158 { "cpp_cpu", CPP_CPU_SPEC }, \ 159 { "cc1_cpu", CC1_CPU_SPEC }, \ 160 { "link_cpu", LINK_CPU_SPEC }, \ 161 { "startfile_cpu", STARTFILE_CPU_SPEC }, \ 162 { "endfile_cpu", ENDFILE_CPU_SPEC }, \ 163 { "relax", RELAX_SPEC }, \ 164 SUBTARGET_EXTRA_SPECS 165 166 #define CC1_SPEC "%{G*} %(cc1_cpu)" 167 168 /* Options to pass on to the assembler. */ 169 #undef ASM_SPEC 170 #define ASM_SPEC "%{v} %(asm_cpu) %(relax)" 171 172 #undef ASM_FINAL_SPEC 173 174 #define LINK_SPEC "%{v} %(link_cpu) %(relax)" 175 176 #undef STARTFILE_SPEC 177 #define STARTFILE_SPEC "%(startfile_cpu)" 178 179 #undef ENDFILE_SPEC 180 #define ENDFILE_SPEC "%(endfile_cpu)" 181 182 #undef LIB_SPEC 183 184 /* Run-time compilation parameters selecting different hardware subsets. */ 185 186 extern int target_flags; 187 188 /* If nonzero, tell the linker to do relaxing. 189 We don't do anything with the option, other than recognize it. 190 LINK_SPEC handles passing -relax to the linker. 191 This can cause incorrect debugging information as line numbers may 192 turn out wrong. This shouldn't be specified unless accompanied with -O2 193 [where the user expects debugging information to be less accurate]. */ 194 #define TARGET_RELAX_MASK (1 << 0) 195 196 /* For miscellaneous debugging purposes. */ 197 #define TARGET_DEBUG_MASK (1 << 1) 198 #define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK) 199 200 /* Align loops to 32 byte boundaries (cache line size). */ 201 /* ??? This option is experimental and is not documented. */ 202 #define TARGET_ALIGN_LOOPS_MASK (1 << 2) 203 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK) 204 205 /* Change issue rate. */ 206 #define TARGET_LOW_ISSUE_RATE_MASK (1 << 3) 207 #define TARGET_LOW_ISSUE_RATE (target_flags & TARGET_LOW_ISSUE_RATE_MASK) 208 209 /* Change branch cost */ 210 #define TARGET_BRANCH_COST_MASK (1 << 4) 211 #define TARGET_BRANCH_COST (target_flags & TARGET_BRANCH_COST_MASK) 212 213 /* Target machine to compile for. */ 214 #define TARGET_M32R 1 215 216 /* Support extended instruction set. */ 217 #define TARGET_M32RX_MASK (1 << 5) 218 #define TARGET_M32RX (target_flags & TARGET_M32RX_MASK) 219 #undef TARGET_M32R 220 #define TARGET_M32R (! TARGET_M32RX) 221 222 /* Macro to define tables used to set the flags. 223 This is a list in braces of pairs in braces, 224 each pair being { "NAME", VALUE } 225 where VALUE is the bits to set or minus the bits to clear. 226 An empty string NAME is used to identify the default VALUE. */ 227 228 #ifndef SUBTARGET_SWITCHES 229 #define SUBTARGET_SWITCHES 230 #endif 231 232 #ifndef TARGET_DEFAULT 233 #define TARGET_DEFAULT 0 234 #endif 235 236 #define TARGET_SWITCHES \ 237 { \ 238 /* { "relax", TARGET_RELAX_MASK, "" }, \ 239 { "no-relax", -TARGET_RELAX_MASK, "" },*/ \ 240 { "debug", TARGET_DEBUG_MASK, \ 241 N_("Display compile time statistics") }, \ 242 { "align-loops", TARGET_ALIGN_LOOPS_MASK, \ 243 N_("Align all loops to 32 byte boundary") }, \ 244 { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK, "" }, \ 245 { "issue-rate=1", TARGET_LOW_ISSUE_RATE_MASK, \ 246 N_("Only issue one instruction per cycle") }, \ 247 { "issue-rate=2", -TARGET_LOW_ISSUE_RATE_MASK, "" }, \ 248 { "branch-cost=1", TARGET_BRANCH_COST_MASK, \ 249 N_("Prefer branches over conditional execution") }, \ 250 { "branch-cost=2", -TARGET_BRANCH_COST_MASK, "" }, \ 251 SUBTARGET_SWITCHES \ 252 { "", TARGET_DEFAULT, "" } \ 253 } 254 255 extern const char * m32r_model_string; 256 extern const char * m32r_sdata_string; 257 258 #ifndef SUBTARGET_OPTIONS 259 #define SUBTARGET_OPTIONS 260 #endif 261 262 #define TARGET_OPTIONS \ 263 { \ 264 { "model=", & m32r_model_string, \ 265 N_("Code size: small, medium or large") }, \ 266 { "sdata=", & m32r_sdata_string, \ 267 N_("Small data area: none, sdata, use") } \ 268 SUBTARGET_OPTIONS \ 269 } 270 271 /* Code Models 272 273 Code models are used to select between two choices of two separate 274 possibilities (address space size, call insn to use): 275 276 small: addresses use 24 bits, use bl to make calls 277 medium: addresses use 32 bits, use bl to make calls (*1) 278 large: addresses use 32 bits, use seth/add3/jl to make calls (*2) 279 280 The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but 281 using this one doesn't make much sense. 282 283 (*1) The linker may eventually be able to relax seth/add3 -> ld24. 284 (*2) The linker may eventually be able to relax seth/add3/jl -> bl. 285 286 Internally these are recorded as TARGET_ADDR{24,32} and 287 TARGET_CALL{26,32}. 288 289 The __model__ attribute can be used to select the code model to use when 290 accessing particular objects. */ 291 292 enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE }; 293 294 extern enum m32r_model m32r_model; 295 #define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL) 296 #define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM) 297 #define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE) 298 #define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL) 299 #define TARGET_ADDR32 (! TARGET_ADDR24) 300 #define TARGET_CALL26 (! TARGET_CALL32) 301 #define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE) 302 303 /* The default is the small model. */ 304 #ifndef M32R_MODEL_DEFAULT 305 #define M32R_MODEL_DEFAULT "small" 306 #endif 307 308 /* Small Data Area 309 310 The SDA consists of sections .sdata, .sbss, and .scommon. 311 .scommon isn't a real section, symbols in it have their section index 312 set to SHN_M32R_SCOMMON, though support for it exists in the linker script. 313 314 Two switches control the SDA: 315 316 -G NNN - specifies the maximum size of variable to go in the SDA 317 318 -msdata=foo - specifies how such variables are handled 319 320 -msdata=none - small data area is disabled 321 322 -msdata=sdata - small data goes in the SDA, special code isn't 323 generated to use it, and special relocs aren't 324 generated 325 326 -msdata=use - small data goes in the SDA, special code is generated 327 to use the SDA and special relocs are generated 328 329 The SDA is not multilib'd, it isn't necessary. 330 MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd 331 libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use 332 -msdata=use will successfully link with them (references in header files 333 will cause the compiler to emit code that refers to library objects in 334 .data). ??? There can be a problem if the user passes a -G value greater 335 than the default and a library object in a header file is that size. 336 The default is 8 so this should be rare - if it occurs the user 337 is required to rebuild the libraries or use a smaller value for -G. 338 */ 339 340 /* Maximum size of variables that go in .sdata/.sbss. 341 The -msdata=foo switch also controls how small variables are handled. */ 342 #ifndef SDATA_DEFAULT_SIZE 343 #define SDATA_DEFAULT_SIZE 8 344 #endif 345 346 extern int g_switch_value; /* value of the -G xx switch */ 347 extern int g_switch_set; /* whether -G xx was passed. */ 348 349 enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE }; 350 351 extern enum m32r_sdata m32r_sdata; 352 #define TARGET_SDATA_NONE (m32r_sdata == M32R_SDATA_NONE) 353 #define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA) 354 #define TARGET_SDATA_USE (m32r_sdata == M32R_SDATA_USE) 355 356 /* Default is to disable the SDA 357 [for upward compatibility with previous toolchains]. */ 358 #ifndef M32R_SDATA_DEFAULT 359 #define M32R_SDATA_DEFAULT "none" 360 #endif 361 362 /* Define this macro as a C expression for the initializer of an array of 363 strings to tell the driver program which options are defaults for this 364 target and thus do not need to be handled specially when using 365 `MULTILIB_OPTIONS'. */ 366 #ifndef SUBTARGET_MULTILIB_DEFAULTS 367 #define SUBTARGET_MULTILIB_DEFAULTS 368 #endif 369 370 #ifndef MULTILIB_DEFAULTS 371 #define MULTILIB_DEFAULTS { "mmodel=small" SUBTARGET_MULTILIB_DEFAULTS } 372 #endif 373 374 /* Sometimes certain combinations of command options do not make 375 sense on a particular target machine. You can define a macro 376 `OVERRIDE_OPTIONS' to take account of this. This macro, if 377 defined, is executed once just after all the command options have 378 been parsed. 379 380 Don't use this macro to turn on various extra optimizations for 381 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 382 383 #ifndef SUBTARGET_OVERRIDE_OPTIONS 384 #define SUBTARGET_OVERRIDE_OPTIONS 385 #endif 386 387 #define OVERRIDE_OPTIONS \ 388 do \ 389 { \ 390 /* These need to be done at start up. \ 391 It's convenient to do them here. */ \ 392 m32r_init (); \ 393 SUBTARGET_OVERRIDE_OPTIONS \ 394 } \ 395 while (0) 396 397 #ifndef SUBTARGET_OPTIMIZATION_OPTIONS 398 #define SUBTARGET_OPTIMIZATION_OPTIONS 399 #endif 400 401 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 402 do \ 403 { \ 404 if (LEVEL == 1) \ 405 flag_regmove = TRUE; \ 406 \ 407 if (SIZE) \ 408 { \ 409 flag_omit_frame_pointer = TRUE; \ 410 flag_strength_reduce = FALSE; \ 411 } \ 412 \ 413 SUBTARGET_OPTIMIZATION_OPTIONS \ 414 } \ 415 while (0) 416 417 /* Define this macro if debugging can be performed even without a 418 frame pointer. If this macro is defined, GNU CC will turn on the 419 `-fomit-frame-pointer' option whenever `-O' is specified. */ 420 #define CAN_DEBUG_WITHOUT_FP 421 422 /* Target machine storage layout. */ 423 424 /* Define this if most significant bit is lowest numbered 425 in instructions that operate on numbered bit-fields. */ 426 #define BITS_BIG_ENDIAN 1 427 428 /* Define this if most significant byte of a word is the lowest numbered. */ 429 #define BYTES_BIG_ENDIAN 1 430 431 /* Define this if most significant word of a multiword number is the lowest 432 numbered. */ 433 #define WORDS_BIG_ENDIAN 1 434 435 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must 436 be a constant value with the same meaning as WORDS_BIG_ENDIAN, 437 which will be used only when compiling libgcc2.c. Typically the 438 value will be set based on preprocessor defines. */ 439 /*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/ 440 441 /* Width of a word, in units (bytes). */ 442 #define UNITS_PER_WORD 4 443 444 /* Define this macro if it is advisable to hold scalars in registers 445 in a wider mode than that declared by the program. In such cases, 446 the value is constrained to be within the bounds of the declared 447 type, but kept valid in the wider mode. The signedness of the 448 extension may differ from that of the type. */ 449 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 450 if (GET_MODE_CLASS (MODE) == MODE_INT \ 451 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 452 { \ 453 (MODE) = SImode; \ 454 } 455 456 /* Define this macro if the promotion described by `PROMOTE_MODE' 457 should also be done for outgoing function arguments. */ 458 /*#define PROMOTE_FUNCTION_ARGS*/ 459 460 /* Likewise, if the function return value is promoted. 461 If defined, FUNCTION_VALUE must perform the same promotions done by 462 PROMOTE_MODE. */ 463 /*#define PROMOTE_FUNCTION_RETURN*/ 464 465 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 466 #define PARM_BOUNDARY 32 467 468 /* Boundary (in *bits*) on which stack pointer should be aligned. */ 469 #define STACK_BOUNDARY 32 470 471 /* ALIGN FRAMES on word boundaries */ 472 #define M32R_STACK_ALIGN(LOC) (((LOC)+3) & ~3) 473 474 /* Allocation boundary (in *bits*) for the code of a function. */ 475 #define FUNCTION_BOUNDARY 32 476 477 /* Alignment of field after `int : 0' in a structure. */ 478 #define EMPTY_FIELD_BOUNDARY 32 479 480 /* Every structure's size must be a multiple of this. */ 481 #define STRUCTURE_SIZE_BOUNDARY 8 482 483 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 484 #define PCC_BITFIELD_TYPE_MATTERS 1 485 486 /* No data type wants to be aligned rounder than this. */ 487 #define BIGGEST_ALIGNMENT 32 488 489 /* The best alignment to use in cases where we have a choice. */ 490 #define FASTEST_ALIGNMENT 32 491 492 /* Make strings word-aligned so strcpy from constants will be faster. */ 493 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 494 ((TREE_CODE (EXP) == STRING_CST \ 495 && (ALIGN) < FASTEST_ALIGNMENT) \ 496 ? FASTEST_ALIGNMENT : (ALIGN)) 497 498 /* Make arrays of chars word-aligned for the same reasons. */ 499 #define DATA_ALIGNMENT(TYPE, ALIGN) \ 500 (TREE_CODE (TYPE) == ARRAY_TYPE \ 501 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 502 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) 503 504 /* Set this nonzero if move instructions will actually fail to work 505 when given unaligned data. */ 506 #define STRICT_ALIGNMENT 1 507 508 /* Layout of source language data types. */ 509 510 #define SHORT_TYPE_SIZE 16 511 #define INT_TYPE_SIZE 32 512 #define LONG_TYPE_SIZE 32 513 #define LONG_LONG_TYPE_SIZE 64 514 #define FLOAT_TYPE_SIZE 32 515 #define DOUBLE_TYPE_SIZE 64 516 #define LONG_DOUBLE_TYPE_SIZE 64 517 518 /* Define this as 1 if `char' should by default be signed; else as 0. */ 519 #define DEFAULT_SIGNED_CHAR 1 520 521 #define SIZE_TYPE "long unsigned int" 522 #define PTRDIFF_TYPE "long int" 523 #define WCHAR_TYPE "short unsigned int" 524 #define WCHAR_TYPE_SIZE 16 525 526 /* Standard register usage. */ 527 528 /* Number of actual hardware registers. 529 The hardware registers are assigned numbers for the compiler 530 from 0 to just below FIRST_PSEUDO_REGISTER. 531 All registers that the compiler knows about must be given numbers, 532 even those that are not normally considered general registers. */ 533 534 #define M32R_NUM_REGISTERS 19 535 536 #ifndef SUBTARGET_NUM_REGISTERS 537 #define SUBTARGET_NUM_REGISTERS 0 538 #endif 539 540 #define FIRST_PSEUDO_REGISTER (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS) 541 542 /* 1 for registers that have pervasive standard uses 543 and are not available for the register allocator. 544 545 0-3 - arguments/results 546 4-5 - call used [4 is used as a tmp during prologue/epilogue generation] 547 6 - call used, gptmp 548 7 - call used, static chain pointer 549 8-11 - call saved 550 12 - call saved [reserved for global pointer] 551 13 - frame pointer 552 14 - subroutine link register 553 15 - stack pointer 554 16 - arg pointer 555 17 - carry flag 556 18 - accumulator 557 19 - accumulator 1 in the m32r/x 558 By default, the extension registers are not available. */ 559 560 #ifndef SUBTARGET_FIXED_REGISTERS 561 #define SUBTARGET_FIXED_REGISTERS 562 #endif 563 564 #define FIXED_REGISTERS \ 565 { \ 566 0, 0, 0, 0, 0, 0, 0, 0, \ 567 0, 0, 0, 0, 0, 0, 0, 1, \ 568 1, 1, 1 \ 569 SUBTARGET_FIXED_REGISTERS \ 570 } 571 572 /* 1 for registers not available across function calls. 573 These must include the FIXED_REGISTERS and also any 574 registers that can be used without being saved. 575 The latter must include the registers where values are returned 576 and the register where structure-value addresses are passed. 577 Aside from that, you can include as many other registers as you like. */ 578 579 #ifndef SUBTARGET_CALL_USED_REGISTERS 580 #define SUBTARGET_CALL_USED_REGISTERS 581 #endif 582 583 #define CALL_USED_REGISTERS \ 584 { \ 585 1, 1, 1, 1, 1, 1, 1, 1, \ 586 0, 0, 0, 0, 0, 0, 1, 1, \ 587 1, 1, 1 \ 588 SUBTARGET_CALL_USED_REGISTERS \ 589 } 590 591 /* Zero or more C statements that may conditionally modify two variables 592 `fixed_regs' and `call_used_regs' (both of type `char []') after they 593 have been initialized from the two preceding macros. 594 595 This is necessary in case the fixed or call-clobbered registers depend 596 on target flags. 597 598 You need not define this macro if it has no work to do. */ 599 600 #ifdef SUBTARGET_CONDITIONAL_REGISTER_USAGE 601 #define CONDITIONAL_REGISTER_USAGE SUBTARGET_CONDITIONAL_REGISTER_USAGE 602 #endif 603 604 /* If defined, an initializer for a vector of integers, containing the 605 numbers of hard registers in the order in which GNU CC should 606 prefer to use them (from most preferred to least). */ 607 608 #ifndef SUBTARGET_REG_ALLOC_ORDER 609 #define SUBTARGET_REG_ALLOC_ORDER 610 #endif 611 612 #if 1 /* better for int code */ 613 #define REG_ALLOC_ORDER \ 614 { \ 615 4, 5, 6, 7, 2, 3, 8, 9, 10, \ 616 11, 12, 13, 14, 0, 1, 15, 16, 17, 18 \ 617 SUBTARGET_REG_ALLOC_ORDER \ 618 } 619 620 #else /* better for fp code at expense of int code */ 621 #define REG_ALLOC_ORDER \ 622 { \ 623 0, 1, 2, 3, 4, 5, 6, 7, 8, \ 624 9, 10, 11, 12, 13, 14, 15, 16, 17, 18 \ 625 SUBTARGET_REG_ALLOC_ORDER \ 626 } 627 #endif 628 629 /* Return number of consecutive hard regs needed starting at reg REGNO 630 to hold something of mode MODE. 631 This is ordinarily the length in words of a value of mode MODE 632 but can be less for certain modes in special long registers. */ 633 #define HARD_REGNO_NREGS(REGNO, MODE) \ 634 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 635 636 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 637 extern const unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER]; 638 extern unsigned int m32r_mode_class[]; 639 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 640 ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0) 641 642 /* A C expression that is nonzero if it is desirable to choose 643 register allocation so as to avoid move instructions between a 644 value of mode MODE1 and a value of mode MODE2. 645 646 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, 647 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1, 648 MODE2)' must be zero. */ 649 650 /* Tie QI/HI/SI modes together. */ 651 #define MODES_TIEABLE_P(MODE1, MODE2) \ 652 (GET_MODE_CLASS (MODE1) == MODE_INT \ 653 && GET_MODE_CLASS (MODE2) == MODE_INT \ 654 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \ 655 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD) 656 657 /* Register classes and constants. */ 658 659 /* Define the classes of registers for register constraints in the 660 machine description. Also define ranges of constants. 661 662 One of the classes must always be named ALL_REGS and include all hard regs. 663 If there is more than one class, another class must be named NO_REGS 664 and contain no registers. 665 666 The name GENERAL_REGS must be the name of a class (or an alias for 667 another name such as ALL_REGS). This is the class of registers 668 that is allowed by "g" or "r" in a register constraint. 669 Also, registers outside this class are allocated only when 670 instructions express preferences for them. 671 672 The classes must be numbered in nondecreasing order; that is, 673 a larger-numbered class must never be contained completely 674 in a smaller-numbered class. 675 676 For any two classes, it is very desirable that there be another 677 class that represents their union. 678 679 It is important that any condition codes have class NO_REGS. 680 See `register_operand'. */ 681 682 enum reg_class 683 { 684 NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES 685 }; 686 687 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 688 689 /* Give names of register classes as strings for dump file. */ 690 #define REG_CLASS_NAMES \ 691 { "NO_REGS", "CARRY_REG", "ACCUM_REGS", "GENERAL_REGS", "ALL_REGS" } 692 693 /* Define which registers fit in which classes. 694 This is an initializer for a vector of HARD_REG_SET 695 of length N_REG_CLASSES. */ 696 697 #ifndef SUBTARGET_REG_CLASS_CARRY 698 #define SUBTARGET_REG_CLASS_CARRY 0 699 #endif 700 701 #ifndef SUBTARGET_REG_CLASS_ACCUM 702 #define SUBTARGET_REG_CLASS_ACCUM 0 703 #endif 704 705 #ifndef SUBTARGET_REG_CLASS_GENERAL 706 #define SUBTARGET_REG_CLASS_GENERAL 0 707 #endif 708 709 #ifndef SUBTARGET_REG_CLASS_ALL 710 #define SUBTARGET_REG_CLASS_ALL 0 711 #endif 712 713 #define REG_CLASS_CONTENTS \ 714 { \ 715 { 0x00000 }, \ 716 { 0x20000 | SUBTARGET_REG_CLASS_CARRY }, \ 717 { 0x40000 | SUBTARGET_REG_CLASS_ACCUM }, \ 718 { 0x1ffff | SUBTARGET_REG_CLASS_GENERAL }, \ 719 { 0x7ffff | SUBTARGET_REG_CLASS_ALL }, \ 720 } 721 722 /* The same information, inverted: 723 Return the class number of the smallest class containing 724 reg number REGNO. This could be a conditional expression 725 or could index an array. */ 726 extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER]; 727 #define REGNO_REG_CLASS(REGNO) (m32r_regno_reg_class[REGNO]) 728 729 /* The class value for index registers, and the one for base regs. */ 730 #define INDEX_REG_CLASS GENERAL_REGS 731 #define BASE_REG_CLASS GENERAL_REGS 732 733 #define REG_CLASS_FROM_LETTER(C) \ 734 ((C) == 'c' ? CARRY_REG \ 735 : (C) == 'a' ? ACCUM_REGS \ 736 : NO_REGS) 737 738 /* These assume that REGNO is a hard or pseudo reg number. 739 They give nonzero only if REGNO is a hard reg of the suitable class 740 or a pseudo reg currently allocated to a suitable hard reg. 741 Since they use reg_renumber, they are safe only once reg_renumber 742 has been allocated, which happens in local-alloc.c. */ 743 #define REGNO_OK_FOR_BASE_P(REGNO) \ 744 ((REGNO) < FIRST_PSEUDO_REGISTER \ 745 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \ 746 : GPR_P (reg_renumber[REGNO])) 747 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO) 748 749 /* Given an rtx X being reloaded into a reg required to be 750 in class CLASS, return the class of reg to actually use. 751 In general this is just CLASS; but on some machines 752 in some cases it is preferable to use a more restrictive class. */ 753 #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 754 (CLASS) 755 756 /* Return the maximum number of consecutive registers 757 needed to represent mode MODE in a register of class CLASS. */ 758 #define CLASS_MAX_NREGS(CLASS, MODE) \ 759 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 760 761 /* The letters I, J, K, L, M, N, O, P in a register constraint string 762 can be used to stand for particular ranges of immediate operands. 763 This macro defines what the ranges are. 764 C is the letter, and VALUE is a constant value. 765 Return 1 if VALUE is in the range specified by C. */ 766 /* 'I' is used for 8 bit signed immediates. 767 'J' is used for 16 bit signed immediates. 768 'K' is used for 16 bit unsigned immediates. 769 'L' is used for 16 bit immediates left shifted by 16 (sign ???). 770 'M' is used for 24 bit unsigned immediates. 771 'N' is used for any 32 bit non-symbolic value. 772 'O' is used for 5 bit unsigned immediates (shift count). 773 'P' is used for 16 bit signed immediates for compares 774 (values in the range -32767 to +32768). */ 775 776 /* Return true if a value is inside a range. */ 777 #define IN_RANGE_P(VALUE, LOW, HIGH) \ 778 (((unsigned HOST_WIDE_INT)((VALUE) - (LOW))) \ 779 <= ((unsigned HOST_WIDE_INT)((HIGH) - (LOW)))) 780 781 /* Local to this file. */ 782 #define INT8_P(X) ((X) >= -0x80 && (X) <= 0x7f) 783 #define INT16_P(X) ((X) >= -0x8000 && (X) <= 0x7fff) 784 #define CMP_INT16_P(X) ((X) >= -0x7fff && (X) <= 0x8000) 785 #define UPPER16_P(X) (((X) & 0xffff) == 0 \ 786 && ((X) >> 16) >= -0x8000 \ 787 && ((X) >> 16) <= 0x7fff) 788 #define UINT16_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0x0000ffff) 789 #define UINT24_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0x00ffffff) 790 #define UINT32_P(X) (((unsigned HOST_WIDE_INT) (X)) <= 0xffffffff) 791 #define UINT5_P(X) ((X) >= 0 && (X) < 32) 792 #define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128) 793 794 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 795 ((C) == 'I' ? INT8_P (VALUE) \ 796 : (C) == 'J' ? INT16_P (VALUE) \ 797 : (C) == 'K' ? UINT16_P (VALUE) \ 798 : (C) == 'L' ? UPPER16_P (VALUE) \ 799 : (C) == 'M' ? UINT24_P (VALUE) \ 800 : (C) == 'N' ? INVERTED_SIGNED_8BIT (VALUE) \ 801 : (C) == 'O' ? UINT5_P (VALUE) \ 802 : (C) == 'P' ? CMP_INT16_P (VALUE) \ 803 : 0) 804 805 /* Similar, but for floating constants, and defining letters G and H. 806 Here VALUE is the CONST_DOUBLE rtx itself. 807 For the m32r, handle a few constants inline. 808 ??? We needn't treat DI and DF modes differently, but for now we do. */ 809 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 810 ((C) == 'G' ? easy_di_const (VALUE) \ 811 : (C) == 'H' ? easy_df_const (VALUE) \ 812 : 0) 813 814 /* A C expression that defines the optional machine-dependent constraint 815 letters that can be used to segregate specific types of operands, 816 usually memory references, for the target machine. It should return 1 if 817 VALUE corresponds to the operand type represented by the constraint letter 818 C. If C is not defined as an extra constraint, the value returned should 819 be 0 regardless of VALUE. */ 820 /* Q is for symbolic addresses loadable with ld24. 821 R is for symbolic addresses when ld24 can't be used. 822 S is for stores with pre {inc,dec}rement 823 T is for indirect of a pointer. 824 U is for loads with post increment. */ 825 826 #define EXTRA_CONSTRAINT(VALUE, C) \ 827 ( (C) == 'Q' ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \ 828 || addr24_operand (VALUE, VOIDmode)) \ 829 : (C) == 'R' ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \ 830 || addr32_operand (VALUE, VOIDmode)) \ 831 : (C) == 'S' ? (GET_CODE (VALUE) == MEM \ 832 && STORE_PREINC_PREDEC_P (GET_MODE (VALUE), \ 833 XEXP (VALUE, 0))) \ 834 : (C) == 'T' ? (GET_CODE (VALUE) == MEM \ 835 && memreg_operand (VALUE, GET_MODE (VALUE))) \ 836 : (C) == 'U' ? (GET_CODE (VALUE) == MEM \ 837 && LOAD_POSTINC_P (GET_MODE (VALUE), \ 838 XEXP (VALUE, 0))) \ 839 : 0) 840 841 /* Stack layout and stack pointer usage. */ 842 843 /* Define this macro if pushing a word onto the stack moves the stack 844 pointer to a smaller address. */ 845 #define STACK_GROWS_DOWNWARD 846 847 /* Define this if the nominal address of the stack frame 848 is at the high-address end of the local variables; 849 that is, each additional local variable allocated 850 goes at a more negative offset from the frame pointer. */ 851 /*#define FRAME_GROWS_DOWNWARD*/ 852 853 /* Offset from frame pointer to start allocating local variables at. 854 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 855 first local allocated. Otherwise, it is the offset to the BEGINNING 856 of the first local allocated. */ 857 /* The frame pointer points at the same place as the stack pointer, except if 858 alloca has been called. */ 859 #define STARTING_FRAME_OFFSET \ 860 M32R_STACK_ALIGN (current_function_outgoing_args_size) 861 862 /* Offset from the stack pointer register to the first location at which 863 outgoing arguments are placed. */ 864 #define STACK_POINTER_OFFSET 0 865 866 /* Offset of first parameter from the argument pointer register value. */ 867 #define FIRST_PARM_OFFSET(FNDECL) 0 868 869 /* A C expression whose value is RTL representing the address in a 870 stack frame where the pointer to the caller's frame is stored. 871 Assume that FRAMEADDR is an RTL expression for the address of the 872 stack frame itself. 873 874 If you don't define this macro, the default is to return the value 875 of FRAMEADDR--that is, the stack frame address is also the address 876 of the stack word that points to the previous frame. */ 877 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/ 878 879 /* A C expression whose value is RTL representing the value of the 880 return address for the frame COUNT steps up from the current frame. 881 FRAMEADDR is the frame pointer of the COUNT frame, or the frame 882 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' 883 is defined. */ 884 /* The current return address is in r14. */ 885 #if 0 /* The default value should work. */ 886 #define RETURN_ADDR_RTX(COUNT, FRAME) \ 887 (((COUNT) == -1) \ 888 ? gen_rtx_REG (Pmode, 14) \ 889 : copy_to_reg (gen_rtx_MEM (Pmode, \ 890 memory_address (Pmode, \ 891 plus_constant ((FRAME), \ 892 UNITS_PER_WORD))))) 893 #endif 894 895 /* Register to use for pushing function arguments. */ 896 #define STACK_POINTER_REGNUM 15 897 898 /* Base register for access to local variables of the function. */ 899 #define FRAME_POINTER_REGNUM 13 900 901 /* Base register for access to arguments of the function. */ 902 #define ARG_POINTER_REGNUM 16 903 904 /* The register number of the return address pointer register, which 905 is used to access the current function's return address from the 906 stack. On some machines, the return address is not at a fixed 907 offset from the frame pointer or stack pointer or argument 908 pointer. This register can be defined to point to the return 909 address on the stack, and then be converted by `ELIMINABLE_REGS' 910 into either the frame pointer or stack pointer. 911 912 Do not define this macro unless there is no other way to get the 913 return address from the stack. */ 914 /* ??? revisit */ 915 /* #define RETURN_ADDRESS_POINTER_REGNUM */ 916 917 /* Register in which static-chain is passed to a function. This must 918 not be a register used by the prologue. */ 919 #define STATIC_CHAIN_REGNUM 7 920 921 /* These aren't official macros. */ 922 #define PROLOGUE_TMP_REGNUM 4 923 #define RETURN_ADDR_REGNUM 14 924 /* #define GP_REGNUM 12 */ 925 #define CARRY_REGNUM 17 926 #define ACCUM_REGNUM 18 927 #define M32R_MAX_INT_REGS 16 928 929 #ifndef SUBTARGET_GPR_P 930 #define SUBTARGET_GPR_P(REGNO) 0 931 #endif 932 933 #ifndef SUBTARGET_ACCUM_P 934 #define SUBTARGET_ACCUM_P(REGNO) 0 935 #endif 936 937 #ifndef SUBTARGET_CARRY_P 938 #define SUBTARGET_CARRY_P(REGNO) 0 939 #endif 940 941 #define GPR_P(REGNO) (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO)) 942 #define ACCUM_P(REGNO) ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO)) 943 #define CARRY_P(REGNO) ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO)) 944 945 /* Eliminating the frame and arg pointers. */ 946 947 /* A C expression which is nonzero if a function must have and use a 948 frame pointer. This expression is evaluated in the reload pass. 949 If its value is nonzero the function will have a frame pointer. */ 950 #define FRAME_POINTER_REQUIRED current_function_calls_alloca 951 952 #if 0 953 /* C statement to store the difference between the frame pointer 954 and the stack pointer values immediately after the function prologue. 955 If `ELIMINABLE_REGS' is defined, this macro will be not be used and 956 need not be defined. */ 957 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ 958 ((VAR) = m32r_compute_frame_size (get_frame_size ())) 959 #endif 960 961 /* If defined, this macro specifies a table of register pairs used to 962 eliminate unneeded registers that point into the stack frame. If 963 it is not defined, the only elimination attempted by the compiler 964 is to replace references to the frame pointer with references to 965 the stack pointer. 966 967 Note that the elimination of the argument pointer with the stack 968 pointer is specified first since that is the preferred elimination. */ 969 970 #define ELIMINABLE_REGS \ 971 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 972 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 973 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }} 974 975 /* A C expression that returns nonzero if the compiler is allowed to 976 try to replace register number FROM-REG with register number 977 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is 978 defined, and will usually be the constant 1, since most of the 979 cases preventing register elimination are things that the compiler 980 already knows about. */ 981 982 #define CAN_ELIMINATE(FROM, TO) \ 983 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 984 ? ! frame_pointer_needed \ 985 : 1) 986 987 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It 988 specifies the initial difference between the specified pair of 989 registers. This macro must be defined if `ELIMINABLE_REGS' is 990 defined. */ 991 992 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 993 { \ 994 int size = m32r_compute_frame_size (get_frame_size ()); \ 995 \ 996 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 997 (OFFSET) = 0; \ 998 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 999 (OFFSET) = size - current_function_pretend_args_size; \ 1000 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1001 (OFFSET) = size - current_function_pretend_args_size; \ 1002 else \ 1003 abort (); \ 1004 } 1005 1006 /* Function argument passing. */ 1007 1008 /* When a prototype says `char' or `short', really pass an `int'. */ 1009 #define PROMOTE_PROTOTYPES 1 1010 1011 /* If defined, the maximum amount of space required for outgoing 1012 arguments will be computed and placed into the variable 1013 `current_function_outgoing_args_size'. No space will be pushed 1014 onto the stack for each call; instead, the function prologue should 1015 increase the stack frame size by this amount. */ 1016 #define ACCUMULATE_OUTGOING_ARGS 1 1017 1018 /* Define this macro if functions should assume that stack space has 1019 been allocated for arguments even when their values are passed in 1020 registers. 1021 1022 The value of this macro is the size, in bytes, of the area 1023 reserved for arguments passed in registers for the function 1024 represented by FNDECL. 1025 1026 This space can be allocated by the caller, or be a part of the 1027 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 1028 which. */ 1029 #if 0 1030 #define REG_PARM_STACK_SPACE(FNDECL) \ 1031 (M32R_MAX_PARM_REGS * UNITS_PER_WORD) 1032 #endif 1033 1034 /* Value is the number of bytes of arguments automatically 1035 popped when returning from a subroutine call. 1036 FUNDECL is the declaration node of the function (as a tree), 1037 FUNTYPE is the data type of the function (as a tree), 1038 or for a library call it is an identifier node for the subroutine name. 1039 SIZE is the number of bytes of arguments passed on the stack. */ 1040 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0 1041 1042 /* Nonzero if we do not know how to pass TYPE solely in registers. */ 1043 #define MUST_PASS_IN_STACK(MODE, TYPE) \ 1044 ((TYPE) != 0 \ 1045 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \ 1046 || TREE_ADDRESSABLE (TYPE))) 1047 1048 /* Define a data type for recording info about an argument list 1049 during the scan of that argument list. This data type should 1050 hold all necessary information about the function itself 1051 and about the args processed so far, enough to enable macros 1052 such as FUNCTION_ARG to determine where the next arg should go. */ 1053 #define CUMULATIVE_ARGS int 1054 1055 /* Initialize a variable CUM of type CUMULATIVE_ARGS 1056 for a call to a function whose data type is FNTYPE. 1057 For a library call, FNTYPE is 0. */ 1058 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \ 1059 ((CUM) = 0) 1060 1061 /* The number of registers used for parameter passing. Local to this file. */ 1062 #define M32R_MAX_PARM_REGS 4 1063 1064 /* 1 if N is a possible register number for function argument passing. */ 1065 #define FUNCTION_ARG_REGNO_P(N) \ 1066 ((unsigned) (N) < M32R_MAX_PARM_REGS) 1067 1068 /* The ROUND_ADVANCE* macros are local to this file. */ 1069 /* Round SIZE up to a word boundary. */ 1070 #define ROUND_ADVANCE(SIZE) \ 1071 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 1072 1073 /* Round arg MODE/TYPE up to the next word boundary. */ 1074 #define ROUND_ADVANCE_ARG(MODE, TYPE) \ 1075 ((MODE) == BLKmode \ 1076 ? ROUND_ADVANCE ((unsigned int) int_size_in_bytes (TYPE)) \ 1077 : ROUND_ADVANCE (GET_MODE_SIZE (MODE))) 1078 1079 /* Round CUM up to the necessary point for argument MODE/TYPE. */ 1080 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM) 1081 1082 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in 1083 a reg. This includes arguments that have to be passed by reference as the 1084 pointer to them is passed in a reg if one is available (and that is what 1085 we're given). 1086 This macro is only used in this file. */ 1087 #define PASS_IN_REG_P(CUM, MODE, TYPE) \ 1088 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS) 1089 1090 /* Determine where to put an argument to a function. 1091 Value is zero to push the argument on the stack, 1092 or a hard register in which to store the argument. 1093 1094 MODE is the argument's machine mode. 1095 TYPE is the data type of the argument (as a tree). 1096 This is null for libcalls where that information may 1097 not be available. 1098 CUM is a variable of type CUMULATIVE_ARGS which gives info about 1099 the preceding args and about the function being called. 1100 NAMED is nonzero if this argument is a named parameter 1101 (otherwise it is an extra parameter matching an ellipsis). */ 1102 /* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers 1103 and the rest are pushed. */ 1104 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1105 (PASS_IN_REG_P ((CUM), (MODE), (TYPE)) \ 1106 ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ 1107 : 0) 1108 1109 /* A C expression for the number of words, at the beginning of an 1110 argument, must be put in registers. The value must be zero for 1111 arguments that are passed entirely in registers or that are entirely 1112 pushed on the stack. 1113 1114 On some machines, certain arguments must be passed partially in 1115 registers and partially in memory. On these machines, typically the 1116 first @var{n} words of arguments are passed in registers, and the rest 1117 on the stack. If a multi-word argument (a @code{double} or a 1118 structure) crosses that boundary, its first few words must be passed 1119 in registers and the rest must be pushed. This macro tells the 1120 compiler when this occurs, and how many of the words should go in 1121 registers. */ 1122 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 1123 function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED) 1124 1125 /* A C expression that indicates when an argument must be passed by 1126 reference. If nonzero for an argument, a copy of that argument is 1127 made in memory and a pointer to the argument is passed instead of 1128 the argument itself. The pointer is passed in whatever way is 1129 appropriate for passing a pointer to that type. */ 1130 /* All arguments greater than 8 bytes are passed this way. */ 1131 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 1132 ((TYPE) && int_size_in_bytes (TYPE) > 8) 1133 1134 /* Update the data in CUM to advance over an argument 1135 of mode MODE and data type TYPE. 1136 (TYPE is null for libcalls where that information may not be available.) */ 1137 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1138 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ 1139 + ROUND_ADVANCE_ARG ((MODE), (TYPE)))) 1140 1141 /* If defined, a C expression that gives the alignment boundary, in bits, 1142 of an argument with the specified mode and type. If it is not defined, 1143 PARM_BOUNDARY is used for all arguments. */ 1144 #if 0 1145 /* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */ 1146 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 1147 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ 1148 ? PARM_BOUNDARY \ 1149 : 2 * PARM_BOUNDARY) 1150 #endif 1151 1152 /* This macro offers an alternative 1153 to using `__builtin_saveregs' and defining the macro 1154 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register 1155 arguments into the stack so that all the arguments appear to have 1156 been passed consecutively on the stack. Once this is done, you 1157 can use the standard implementation of varargs that works for 1158 machines that pass all their arguments on the stack. 1159 1160 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure, 1161 containing the values that obtain after processing of the named 1162 arguments. The arguments MODE and TYPE describe the last named 1163 argument--its machine mode and its data type as a tree node. 1164 1165 The macro implementation should do two things: first, push onto the 1166 stack all the argument registers *not* used for the named 1167 arguments, and second, store the size of the data thus pushed into 1168 the `int'-valued variable whose name is supplied as the argument 1169 PRETEND_SIZE. The value that you store here will serve as 1170 additional offset for setting up the stack frame. 1171 1172 If the argument NO_RTL is nonzero, it means that the 1173 arguments of the function are being analyzed for the second time. 1174 This happens for an inline function, which is not actually 1175 compiled until the end of the source file. The macro 1176 `SETUP_INCOMING_VARARGS' should not generate any instructions in 1177 this case. */ 1178 1179 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ 1180 m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) 1181 1182 /* Implement `va_arg'. */ 1183 #define EXPAND_BUILTIN_VA_ARG(valist, type) \ 1184 m32r_va_arg (valist, type) 1185 1186 /* Function results. */ 1187 1188 /* Define how to find the value returned by a function. 1189 VALTYPE is the data type of the value (as a tree). 1190 If the precise function being called is known, FUNC is its FUNCTION_DECL; 1191 otherwise, FUNC is 0. */ 1192 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) 1193 1194 /* Define how to find the value returned by a library function 1195 assuming the value has mode MODE. */ 1196 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) 1197 1198 /* 1 if N is a possible register number for a function value 1199 as seen by the caller. */ 1200 /* ??? What about r1 in DI/DF values. */ 1201 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) 1202 1203 /* A C expression which can inhibit the returning of certain function 1204 values in registers, based on the type of value. A nonzero value says 1205 to return the function value in memory, just as large structures are 1206 always returned. Here TYPE will be a C expression of type `tree', 1207 representing the data type of the value. */ 1208 #define RETURN_IN_MEMORY(TYPE) \ 1209 (int_size_in_bytes (TYPE) > 8) 1210 1211 /* Tell GCC to use RETURN_IN_MEMORY. */ 1212 #define DEFAULT_PCC_STRUCT_RETURN 0 1213 1214 /* Register in which address to store a structure value 1215 is passed to a function, or 0 to use `invisible' first argument. */ 1216 #define STRUCT_VALUE 0 1217 1218 /* Function entry and exit. */ 1219 1220 /* Initialize data used by insn expanders. This is called from 1221 init_emit, once for each function, before code is generated. */ 1222 #define INIT_EXPANDERS m32r_init_expanders () 1223 1224 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 1225 the stack pointer does not matter. The value is tested only in 1226 functions that have frame pointers. 1227 No definition is equivalent to always zero. */ 1228 #define EXIT_IGNORE_STACK 1 1229 1230 /* Output assembler code to FILE to increment profiler label # LABELNO 1231 for profiling a function entry. */ 1232 #define FUNCTION_PROFILER(FILE, LABELNO) abort () 1233 1234 /* Trampolines. */ 1235 1236 /* On the M32R, the trampoline is 1237 1238 ld24 r7,STATIC 1239 ld24 r6,FUNCTION 1240 jmp r6 1241 nop 1242 1243 ??? Need addr32 support. 1244 */ 1245 1246 /* Length in bytes of the trampoline for entering a nested function. */ 1247 #define TRAMPOLINE_SIZE 12 1248 1249 /* Emit RTL insns to initialize the variable parts of a trampoline. 1250 FNADDR is an RTX for the address of the function's pure code. 1251 CXT is an RTX for the static chain value for the function. */ 1252 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1253 do { \ 1254 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \ 1255 plus_constant ((CXT), 0xe7000000)); \ 1256 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \ 1257 plus_constant ((FNADDR), 0xe6000000)); \ 1258 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \ 1259 GEN_INT (0x1fc67000)); \ 1260 emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ 1261 } while (0) 1262 1263 /* Library calls. */ 1264 1265 /* Generate calls to memcpy, memcmp and memset. */ 1266 #define TARGET_MEM_FUNCTIONS 1267 1268 /* Addressing modes, and classification of registers for them. */ 1269 1270 /* Maximum number of registers that can appear in a valid memory address. */ 1271 #define MAX_REGS_PER_ADDRESS 1 1272 1273 /* We have post-inc load and pre-dec,pre-inc store, 1274 but only for 4 byte vals. */ 1275 #define HAVE_PRE_DECREMENT 1 1276 #define HAVE_PRE_INCREMENT 1 1277 #define HAVE_POST_INCREMENT 1 1278 1279 /* Recognize any constant value that is a valid address. */ 1280 #define CONSTANT_ADDRESS_P(X) \ 1281 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 1282 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST) 1283 1284 /* Nonzero if the constant value X is a legitimate general operand. 1285 We don't allow (plus symbol large-constant) as the relocations can't 1286 describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations. 1287 We allow all CONST_DOUBLE's as the md file patterns will force the 1288 constant to memory if they can't handle them. */ 1289 1290 #define LEGITIMATE_CONSTANT_P(X) \ 1291 (! (GET_CODE (X) == CONST \ 1292 && GET_CODE (XEXP (X, 0)) == PLUS \ 1293 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \ 1294 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ 1295 && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767)) 1296 1297 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1298 and check its validity for a certain class. 1299 We have two alternate definitions for each of them. 1300 The usual definition accepts all pseudo regs; the other rejects 1301 them unless they have been allocated suitable hard regs. 1302 The symbol REG_OK_STRICT causes the latter definition to be used. 1303 1304 Most source files want to accept pseudo regs in the hope that 1305 they will get allocated to the class that the insn wants them to be in. 1306 Source files for reload pass need to be strict. 1307 After reload, it makes no difference, since pseudo regs have 1308 been eliminated by then. */ 1309 1310 #ifdef REG_OK_STRICT 1311 1312 /* Nonzero if X is a hard reg that can be used as a base reg. */ 1313 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X)) 1314 /* Nonzero if X is a hard reg that can be used as an index. */ 1315 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) 1316 1317 #else 1318 1319 /* Nonzero if X is a hard reg that can be used as a base reg 1320 or if it is a pseudo reg. */ 1321 #define REG_OK_FOR_BASE_P(X) \ 1322 (GPR_P (REGNO (X)) \ 1323 || (REGNO (X)) == ARG_POINTER_REGNUM \ 1324 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1325 /* Nonzero if X is a hard reg that can be used as an index 1326 or if it is a pseudo reg. */ 1327 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) 1328 1329 #endif 1330 1331 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1332 that is a valid memory address for an instruction. 1333 The MODE argument is the machine mode for the MEM expression 1334 that wants to use this address. */ 1335 1336 /* Local to this file. */ 1337 #define RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X)) 1338 1339 /* Local to this file. */ 1340 #define RTX_OK_FOR_OFFSET_P(X) \ 1341 (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X))) 1342 1343 /* Local to this file. */ 1344 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \ 1345 (GET_CODE (X) == PLUS \ 1346 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ 1347 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1))) 1348 1349 /* Local to this file. */ 1350 /* For LO_SUM addresses, do not allow them if the MODE is > 1 word, 1351 since more than one instruction will be required. */ 1352 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \ 1353 (GET_CODE (X) == LO_SUM \ 1354 && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ 1355 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ 1356 && CONSTANT_P (XEXP (X, 1))) 1357 1358 /* Local to this file. */ 1359 /* Is this a load and increment operation. */ 1360 #define LOAD_POSTINC_P(MODE, X) \ 1361 (((MODE) == SImode || (MODE) == SFmode) \ 1362 && GET_CODE (X) == POST_INC \ 1363 && GET_CODE (XEXP (X, 0)) == REG \ 1364 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) 1365 1366 /* Local to this file. */ 1367 /* Is this an increment/decrement and store operation. */ 1368 #define STORE_PREINC_PREDEC_P(MODE, X) \ 1369 (((MODE) == SImode || (MODE) == SFmode) \ 1370 && (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \ 1371 && GET_CODE (XEXP (X, 0)) == REG \ 1372 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) 1373 1374 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1375 { if (RTX_OK_FOR_BASE_P (X)) \ 1376 goto ADDR; \ 1377 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \ 1378 goto ADDR; \ 1379 if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \ 1380 goto ADDR; \ 1381 if (LOAD_POSTINC_P ((MODE), (X))) \ 1382 goto ADDR; \ 1383 if (STORE_PREINC_PREDEC_P ((MODE), (X))) \ 1384 goto ADDR; \ 1385 } 1386 1387 /* Try machine-dependent ways of modifying an illegitimate address 1388 to be legitimate. If we find one, return the new, valid address. 1389 This macro is used in only one place: `memory_address' in explow.c. 1390 1391 OLDX is the address as it was before break_out_memory_refs was called. 1392 In some cases it is useful to look at this to decide what needs to be done. 1393 1394 MODE and WIN are passed so that this macro can use 1395 GO_IF_LEGITIMATE_ADDRESS. 1396 1397 It is always safe for this macro to do nothing. It exists to recognize 1398 opportunities to optimize the output. 1399 1400 ??? Is there anything useful we can do here for the M32R? */ 1401 1402 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) 1403 1404 /* Go to LABEL if ADDR (a legitimate address expression) 1405 has an effect that depends on the machine mode it is used for. */ 1406 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 1407 do { \ 1408 if (GET_CODE (ADDR) == PRE_DEC \ 1409 || GET_CODE (ADDR) == PRE_INC \ 1410 || GET_CODE (ADDR) == POST_INC \ 1411 || GET_CODE (ADDR) == LO_SUM) \ 1412 goto LABEL; \ 1413 } while (0) 1414 1415 /* Condition code usage. */ 1416 1417 /* Return nonzero if SELECT_CC_MODE will never return MODE for a 1418 floating point inequality comparison. */ 1419 #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/ 1420 1421 /* Costs. */ 1422 1423 /* ??? I'm quite sure I don't understand enough of the subtleties involved 1424 in choosing the right numbers to use here, but there doesn't seem to be 1425 enough documentation on this. What I've done is define an insn to cost 1426 4 "units" and work from there. COSTS_N_INSNS (N) is defined as (N) * 4 - 2 1427 so that seems reasonable. Some values are supposed to be defined relative 1428 to each other and thus aren't necessarily related to COSTS_N_INSNS. */ 1429 1430 /* Compute the cost of computing a constant rtl expression RTX 1431 whose rtx-code is CODE. The body of this macro is a portion 1432 of a switch statement. If the code is computed here, 1433 return it with a return statement. Otherwise, break from the switch. */ 1434 /* Small integers are as cheap as registers. 4 byte values can be fetched 1435 as immediate constants - let's give that the cost of an extra insn. */ 1436 #define CONST_COSTS(X, CODE, OUTER_CODE) \ 1437 case CONST_INT : \ 1438 if (INT16_P (INTVAL (X))) \ 1439 return 0; \ 1440 /* fall through */ \ 1441 case CONST : \ 1442 case LABEL_REF : \ 1443 case SYMBOL_REF : \ 1444 return 4; \ 1445 case CONST_DOUBLE : \ 1446 { \ 1447 rtx high, low; \ 1448 split_double (X, &high, &low); \ 1449 return 4 * (!INT16_P (INTVAL (high)) \ 1450 + !INT16_P (INTVAL (low))); \ 1451 } 1452 1453 /* Compute the cost of an address. */ 1454 #define ADDRESS_COST(ADDR) m32r_address_cost (ADDR) 1455 1456 /* Compute extra cost of moving data between one register class 1457 and another. */ 1458 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2 1459 1460 /* Compute the cost of moving data between registers and memory. */ 1461 /* Memory is 3 times as expensive as registers. 1462 ??? Is that the right way to look at it? */ 1463 #define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \ 1464 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12) 1465 1466 /* The cost of a branch insn. */ 1467 /* A value of 2 here causes GCC to avoid using branches in comparisons like 1468 while (a < N && a). Branches aren't that expensive on the M32R so 1469 we define this as 1. Defining it as 2 had a heavy hit in fp-bit.c. */ 1470 #define BRANCH_COST ((TARGET_BRANCH_COST) ? 2 : 1) 1471 1472 /* Provide the costs of a rtl expression. This is in the body of a 1473 switch on CODE. The purpose for the cost of MULT is to encourage 1474 `synth_mult' to find a synthetic multiply when reasonable. 1475 1476 If we need more than 12 insns to do a multiply, then go out-of-line, 1477 since the call overhead will be < 10% of the cost of the multiply. */ 1478 #define RTX_COSTS(X, CODE, OUTER_CODE) \ 1479 case MULT : \ 1480 return COSTS_N_INSNS (3); \ 1481 case DIV : \ 1482 case UDIV : \ 1483 case MOD : \ 1484 case UMOD : \ 1485 return COSTS_N_INSNS (10); 1486 1487 /* Nonzero if access to memory by bytes is slow and undesirable. 1488 For RISC chips, it means that access to memory by bytes is no 1489 better than access by words when possible, so grab a whole word 1490 and maybe make use of that. */ 1491 #define SLOW_BYTE_ACCESS 1 1492 1493 /* Define this macro if it is as good or better to call a constant 1494 function address than to call an address kept in a register. */ 1495 #define NO_FUNCTION_CSE 1496 1497 /* Define this macro if it is as good or better for a function to call 1498 itself with an explicit address than to call an address kept in a 1499 register. */ 1500 #define NO_RECURSIVE_FUNCTION_CSE 1501 1502 /* When the `length' insn attribute is used, this macro specifies the 1503 value to be assigned to the address of the first insn in a 1504 function. If not specified, 0 is used. */ 1505 #define FIRST_INSN_ADDRESS m32r_first_insn_address () 1506 1507 1508 /* Section selection. */ 1509 1510 #define TEXT_SECTION_ASM_OP "\t.section .text" 1511 #define DATA_SECTION_ASM_OP "\t.section .data" 1512 #define RODATA_SECTION_ASM_OP "\t.section .rodata" 1513 #define BSS_SECTION_ASM_OP "\t.section .bss" 1514 #define SDATA_SECTION_ASM_OP "\t.section .sdata" 1515 #define SBSS_SECTION_ASM_OP "\t.section .sbss" 1516 /* This one is for svr4.h. */ 1517 #undef READONLY_DATA_SECTION_ASM_OP 1518 #define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata" 1519 1520 /* A list of names for sections other than the standard two, which are 1521 `in_text' and `in_data'. You need not define this macro 1522 on a system with no other sections (that GCC needs to use). */ 1523 #undef EXTRA_SECTIONS 1524 #define EXTRA_SECTIONS in_sdata, in_sbss 1525 1526 /* One or more functions to be defined in "varasm.c". These 1527 functions should do jobs analogous to those of `text_section' and 1528 `data_section', for your additional sections. Do not define this 1529 macro if you do not define `EXTRA_SECTIONS'. */ 1530 #undef EXTRA_SECTION_FUNCTIONS 1531 #define EXTRA_SECTION_FUNCTIONS \ 1532 SDATA_SECTION_FUNCTION \ 1533 SBSS_SECTION_FUNCTION 1534 1535 #define SDATA_SECTION_FUNCTION \ 1536 void \ 1537 sdata_section () \ 1538 { \ 1539 if (in_section != in_sdata) \ 1540 { \ 1541 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ 1542 in_section = in_sdata; \ 1543 } \ 1544 } \ 1545 1546 #define SBSS_SECTION_FUNCTION \ 1547 void \ 1548 sbss_section () \ 1549 { \ 1550 if (in_section != in_sbss) \ 1551 { \ 1552 fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP); \ 1553 in_section = in_sbss; \ 1554 } \ 1555 } \ 1556 1557 #undef TARGET_ASM_SELECT_SECTION 1558 #define TARGET_ASM_SELECT_SECTION m32r_select_section 1559 1560 /* Define this macro if jump tables (for tablejump insns) should be 1561 output in the text section, along with the assembler instructions. 1562 Otherwise, the readonly data section is used. 1563 This macro is irrelevant if there is no separate readonly data section. */ 1564 /*#define JUMP_TABLES_IN_TEXT_SECTION*/ 1565 1566 /* Define this macro if references to a symbol must be treated 1567 differently depending on something about the variable or 1568 function named by the symbol (such as what section it is in). 1569 1570 The macro definition, if any, is executed immediately after the 1571 rtl for DECL or other node is created. 1572 The value of the rtl will be a `mem' whose address is a 1573 `symbol_ref'. 1574 1575 The usual thing for this macro to do is to store a flag in the 1576 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified 1577 name string in the `symbol_ref' (if one bit is not enough 1578 information). */ 1579 1580 #define SDATA_FLAG_CHAR '@' 1581 /* Small objects are recorded with no prefix for space efficiency since 1582 they'll be the most common. This isn't the case if the user passes 1583 -mmodel={medium|large} and one could choose to not mark symbols that 1584 are the default, but that complicates things. */ 1585 /*#define SMALL_FLAG_CHAR '#'*/ 1586 #define MEDIUM_FLAG_CHAR '%' 1587 #define LARGE_FLAG_CHAR '&' 1588 1589 #define SDATA_NAME_P(NAME) (*(NAME) == SDATA_FLAG_CHAR) 1590 /*#define SMALL_NAME_P(NAME) (*(NAME) == SMALL_FLAG_CHAR)*/ 1591 #define SMALL_NAME_P(NAME) (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME)) 1592 #define MEDIUM_NAME_P(NAME) (*(NAME) == MEDIUM_FLAG_CHAR) 1593 #define LARGE_NAME_P(NAME) (*(NAME) == LARGE_FLAG_CHAR) 1594 /* For string literals, etc. */ 1595 #define LIT_NAME_P(NAME) ((NAME)[0] == '*' && (NAME)[1] == '.') 1596 1597 #define ENCODED_NAME_P(SYMBOL_NAME) \ 1598 (SDATA_NAME_P (SYMBOL_NAME) \ 1599 /*|| SMALL_NAME_P (SYMBOL_NAME)*/ \ 1600 || MEDIUM_NAME_P (SYMBOL_NAME) \ 1601 || LARGE_NAME_P (SYMBOL_NAME)) 1602 1603 /* PIC */ 1604 1605 /* The register number of the register used to address a table of static 1606 data addresses in memory. In some cases this register is defined by a 1607 processor's ``application binary interface'' (ABI). When this macro 1608 is defined, RTL is generated for this register once, as with the stack 1609 pointer and frame pointer registers. If this macro is not defined, it 1610 is up to the machine-dependent files to allocate such a register (if 1611 necessary). */ 1612 /*#define PIC_OFFSET_TABLE_REGNUM 12*/ 1613 1614 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is 1615 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM 1616 is not defined. */ 1617 /* This register is call-saved on the M32R. */ 1618 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/ 1619 1620 /* By generating position-independent code, when two different programs (A 1621 and B) share a common library (libC.a), the text of the library can be 1622 shared whether or not the library is linked at the same address for both 1623 programs. In some of these environments, position-independent code 1624 requires not only the use of different addressing modes, but also 1625 special code to enable the use of these addressing modes. 1626 1627 The FINALIZE_PIC macro serves as a hook to emit these special 1628 codes once the function is being compiled into assembly code, but not 1629 before. (It is not done before, because in the case of compiling an 1630 inline function, it would lead to multiple PIC prologues being 1631 included in functions which used inline functions and were compiled to 1632 assembly language.) */ 1633 1634 /*#define FINALIZE_PIC m32r_finalize_pic ()*/ 1635 1636 /* A C expression that is nonzero if X is a legitimate immediate 1637 operand on the target machine when generating position independent code. 1638 You can assume that X satisfies CONSTANT_P, so you need not 1639 check this. You can also assume `flag_pic' is true, so you need not 1640 check it either. You need not define this macro if all constants 1641 (including SYMBOL_REF) can be immediate operands when generating 1642 position independent code. */ 1643 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/ 1644 1645 /* Control the assembler format that we output. */ 1646 1647 /* Output at beginning of assembler file. */ 1648 #define ASM_FILE_START(FILE) m32r_asm_file_start (FILE) 1649 1650 /* A C string constant describing how to begin a comment in the target 1651 assembler language. The compiler assumes that the comment will 1652 end at the end of the line. */ 1653 #define ASM_COMMENT_START ";" 1654 1655 /* Output to assembler file text saying following lines 1656 may contain character constants, extra white space, comments, etc. */ 1657 #define ASM_APP_ON "" 1658 1659 /* Output to assembler file text saying following lines 1660 no longer contain unusual constructs. */ 1661 #define ASM_APP_OFF "" 1662 1663 /* Globalizing directive for a label. */ 1664 #define GLOBAL_ASM_OP "\t.global\t" 1665 1666 /* This is how to output a reference to a user-level label named NAME. 1667 `assemble_name' uses this. */ 1668 #undef ASM_OUTPUT_LABELREF 1669 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ 1670 asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME)) 1671 1672 /* If -Os, don't force line number labels to begin at the beginning of 1673 the word; we still want the assembler to try to put things in parallel, 1674 should that be possible. 1675 For m32r/d, instructions are never in parallel (other than with a nop) 1676 and the simulator and stub both handle a breakpoint in the middle of 1677 a word so don't ever force line number labels to begin at the beginning 1678 of a word. */ 1679 1680 #undef ASM_OUTPUT_SOURCE_LINE 1681 #define ASM_OUTPUT_SOURCE_LINE(file, line) \ 1682 do \ 1683 { \ 1684 static int sym_lineno = 1; \ 1685 fprintf (file, ".stabn 68,0,%d,.LM%d-", \ 1686 line, sym_lineno); \ 1687 assemble_name \ 1688 (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \ 1689 fprintf (file, (optimize_size || TARGET_M32R) \ 1690 ? "\n\t.debugsym .LM%d\n" \ 1691 : "\n.LM%d:\n", \ 1692 sym_lineno); \ 1693 sym_lineno += 1; \ 1694 } \ 1695 while (0) 1696 1697 /* Store in OUTPUT a string (made with alloca) containing 1698 an assembler-name for a local static variable named NAME. 1699 LABELNO is an integer which is different for each call. */ 1700 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1701 do \ 1702 { \ 1703 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10);\ 1704 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \ 1705 } \ 1706 while (0) 1707 1708 /* How to refer to registers in assembler output. 1709 This sequence is indexed by compiler's hard-register-number (see above). */ 1710 #ifndef SUBTARGET_REGISTER_NAMES 1711 #define SUBTARGET_REGISTER_NAMES 1712 #endif 1713 1714 #define REGISTER_NAMES \ 1715 { \ 1716 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ 1717 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \ 1718 "ap", "cbit", "a0" \ 1719 SUBTARGET_REGISTER_NAMES \ 1720 } 1721 1722 /* If defined, a C initializer for an array of structures containing 1723 a name and a register number. This macro defines additional names 1724 for hard registers, thus allowing the `asm' option in declarations 1725 to refer to registers using alternate names. */ 1726 #ifndef SUBTARGET_ADDITIONAL_REGISTER_NAMES 1727 #define SUBTARGET_ADDITIONAL_REGISTER_NAMES 1728 #endif 1729 1730 #define ADDITIONAL_REGISTER_NAMES \ 1731 { \ 1732 /*{ "gp", GP_REGNUM },*/ \ 1733 { "r13", FRAME_POINTER_REGNUM }, \ 1734 { "r14", RETURN_ADDR_REGNUM }, \ 1735 { "r15", STACK_POINTER_REGNUM }, \ 1736 SUBTARGET_ADDITIONAL_REGISTER_NAMES \ 1737 } 1738 1739 /* A C expression which evaluates to true if CODE is a valid 1740 punctuation character for use in the `PRINT_OPERAND' macro. */ 1741 extern char m32r_punct_chars[256]; 1742 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ 1743 m32r_punct_chars[(unsigned char) (CHAR)] 1744 1745 /* Print operand X (an rtx) in assembler syntax to file FILE. 1746 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1747 For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1748 #define PRINT_OPERAND(FILE, X, CODE) \ 1749 m32r_print_operand (FILE, X, CODE) 1750 1751 /* A C compound statement to output to stdio stream STREAM the 1752 assembler syntax for an instruction operand that is a memory 1753 reference whose address is ADDR. ADDR is an RTL expression. */ 1754 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1755 m32r_print_operand_address (FILE, ADDR) 1756 1757 /* If defined, C string expressions to be used for the `%R', `%L', 1758 `%U', and `%I' options of `asm_fprintf' (see `final.c'). These 1759 are useful when a single `md' file must support multiple assembler 1760 formats. In that case, the various `tm.h' files can define these 1761 macros differently. */ 1762 #define REGISTER_PREFIX "" 1763 #define LOCAL_LABEL_PREFIX ".L" 1764 #define USER_LABEL_PREFIX "" 1765 #define IMMEDIATE_PREFIX "#" 1766 1767 /* This is how to output an element of a case-vector that is absolute. */ 1768 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1769 do \ 1770 { \ 1771 char label[30]; \ 1772 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ 1773 fprintf (FILE, "\t.word\t"); \ 1774 assemble_name (FILE, label); \ 1775 fprintf (FILE, "\n"); \ 1776 } \ 1777 while (0) 1778 1779 /* This is how to output an element of a case-vector that is relative. */ 1780 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\ 1781 do \ 1782 { \ 1783 char label[30]; \ 1784 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ 1785 fprintf (FILE, "\t.word\t"); \ 1786 assemble_name (FILE, label); \ 1787 fprintf (FILE, "-"); \ 1788 ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \ 1789 assemble_name (FILE, label); \ 1790 fprintf (FILE, ")\n"); \ 1791 } \ 1792 while (0) 1793 1794 /* The desired alignment for the location counter at the beginning 1795 of a loop. */ 1796 /* On the M32R, align loops to 32 byte boundaries (cache line size) 1797 if -malign-loops. */ 1798 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0) 1799 1800 /* Define this to be the maximum number of insns to move around when moving 1801 a loop test from the top of a loop to the bottom 1802 and seeing whether to duplicate it. The default is thirty. 1803 1804 Loop unrolling currently doesn't like this optimization, so 1805 disable doing if we are unrolling loops and saving space. */ 1806 #define LOOP_TEST_THRESHOLD (optimize_size \ 1807 && !flag_unroll_loops \ 1808 && !flag_unroll_all_loops ? 2 : 30) 1809 1810 /* This is how to output an assembler line 1811 that says to advance the location counter 1812 to a multiple of 2**LOG bytes. */ 1813 /* .balign is used to avoid confusion. */ 1814 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1815 do \ 1816 { \ 1817 if ((LOG) != 0) \ 1818 fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); \ 1819 } \ 1820 while (0) 1821 1822 /* Like `ASM_OUTPUT_COMMON' except takes the required alignment as a 1823 separate, explicit argument. If you define this macro, it is used in 1824 place of `ASM_OUTPUT_COMMON', and gives you more flexibility in 1825 handling the required alignment of the variable. The alignment is 1826 specified as the number of bits. */ 1827 1828 #define SCOMMON_ASM_OP "\t.scomm\t" 1829 1830 #undef ASM_OUTPUT_ALIGNED_COMMON 1831 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ 1832 do \ 1833 { \ 1834 if (! TARGET_SDATA_NONE \ 1835 && (SIZE) > 0 && (SIZE) <= g_switch_value) \ 1836 fprintf ((FILE), "%s", SCOMMON_ASM_OP); \ 1837 else \ 1838 fprintf ((FILE), "%s", COMMON_ASM_OP); \ 1839 assemble_name ((FILE), (NAME)); \ 1840 fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ 1841 } \ 1842 while (0) 1843 1844 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a 1845 separate, explicit argument. If you define this macro, it is used in 1846 place of `ASM_OUTPUT_BSS', and gives you more flexibility in 1847 handling the required alignment of the variable. The alignment is 1848 specified as the number of bits. 1849 1850 For the M32R we need sbss support. */ 1851 1852 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 1853 do \ 1854 { \ 1855 (*targetm.asm_out.globalize_label) (FILE, NAME); \ 1856 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \ 1857 } \ 1858 while (0) 1859 1860 /* Debugging information. */ 1861 1862 /* Generate DBX and DWARF debugging information. */ 1863 #define DBX_DEBUGGING_INFO 1 1864 #define DWARF_DEBUGGING_INFO 1 1865 #define DWARF2_DEBUGGING_INFO 1 1866 1867 /* Prefer STABS (for now). */ 1868 #undef PREFERRED_DEBUGGING_TYPE 1869 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG 1870 1871 /* Turn off splitting of long stabs. */ 1872 #define DBX_CONTIN_LENGTH 0 1873 1874 /* Miscellaneous. */ 1875 1876 /* Specify the machine mode that this machine uses 1877 for the index in the tablejump instruction. */ 1878 #define CASE_VECTOR_MODE Pmode 1879 1880 /* Define as C expression which evaluates to nonzero if the tablejump 1881 instruction expects the table to contain offsets from the address of the 1882 table. 1883 Do not define this if the table should contain absolute addresses. */ 1884 /* It's not clear what PIC will look like or whether we want to use -fpic 1885 for the embedded form currently being talked about. For now require -fpic 1886 to get pc relative switch tables. */ 1887 /*#define CASE_VECTOR_PC_RELATIVE 1 */ 1888 1889 /* Define if operations between registers always perform the operation 1890 on the full register even if a narrower mode is specified. */ 1891 #define WORD_REGISTER_OPERATIONS 1892 1893 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1894 will either zero-extend or sign-extend. The value of this macro should 1895 be the code that says which one of the two operations is implicitly 1896 done, NIL if none. */ 1897 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1898 1899 /* Max number of bytes we can move from memory to memory 1900 in one reasonably fast instruction. */ 1901 #define MOVE_MAX 4 1902 1903 /* Define this to be nonzero if shift instructions ignore all but the low-order 1904 few bits. */ 1905 #define SHIFT_COUNT_TRUNCATED 1 1906 1907 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1908 is done just by pretending it is already truncated. */ 1909 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1910 1911 /* We assume that the store-condition-codes instructions store 0 for false 1912 and some other value for true. This is the value stored for true. */ 1913 #define STORE_FLAG_VALUE 1 1914 1915 /* Specify the machine mode that pointers have. 1916 After generation of rtl, the compiler makes no further distinction 1917 between pointers and any other objects of this machine mode. */ 1918 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has 1919 it's own problems (you have to add extendpsisi2 and truncsipsi2). 1920 Try to avoid it. */ 1921 #define Pmode SImode 1922 1923 /* A function address in a call instruction. */ 1924 #define FUNCTION_MODE SImode 1925 1926 /* Define the information needed to generate branch and scc insns. This is 1927 stored from the compare operation. Note that we can't use "rtx" here 1928 since it hasn't been defined! */ 1929 extern struct rtx_def * m32r_compare_op0; 1930 extern struct rtx_def * m32r_compare_op1; 1931 1932 /* M32R function types. */ 1933 enum m32r_function_type 1934 { 1935 M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT 1936 }; 1937 1938 #define M32R_INTERRUPT_P(TYPE) ((TYPE) == M32R_FUNCTION_INTERRUPT) 1939 1940 /* Define this if you have defined special-purpose predicates in the 1941 file `MACHINE.c'. This macro is called within an initializer of an 1942 array of structures. The first field in the structure is the name 1943 of a predicate and the second field is an array of rtl codes. For 1944 each predicate, list all rtl codes that can be in expressions 1945 matched by the predicate. The list should have a trailing comma. */ 1946 1947 #define PREDICATE_CODES \ 1948 { "reg_or_zero_operand", { REG, SUBREG, CONST_INT }}, \ 1949 { "conditional_move_operand", { REG, SUBREG, CONST_INT }}, \ 1950 { "carry_compare_operand", { EQ, NE }}, \ 1951 { "eqne_comparison_operator", { EQ, NE }}, \ 1952 { "signed_comparison_operator", { EQ, NE, LT, LE, GT, GE }}, \ 1953 { "move_dest_operand", { REG, SUBREG, MEM }}, \ 1954 { "move_src_operand", { REG, SUBREG, MEM, CONST_INT, \ 1955 CONST_DOUBLE, LABEL_REF, CONST, \ 1956 SYMBOL_REF }}, \ 1957 { "move_double_src_operand", { REG, SUBREG, MEM, CONST_INT, \ 1958 CONST_DOUBLE }}, \ 1959 { "two_insn_const_operand", { CONST_INT }}, \ 1960 { "symbolic_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \ 1961 { "seth_add3_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \ 1962 { "int8_operand", { CONST_INT }}, \ 1963 { "uint16_operand", { CONST_INT }}, \ 1964 { "reg_or_int16_operand", { REG, SUBREG, CONST_INT }}, \ 1965 { "reg_or_uint16_operand", { REG, SUBREG, CONST_INT }}, \ 1966 { "reg_or_cmp_int16_operand", { REG, SUBREG, CONST_INT }}, \ 1967 { "reg_or_eq_int16_operand", { REG, SUBREG, CONST_INT }}, \ 1968 { "cmp_int16_operand", { CONST_INT }}, \ 1969 { "call_address_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \ 1970 { "extend_operand", { REG, SUBREG, MEM }}, \ 1971 { "small_insn_p", { INSN, CALL_INSN, JUMP_INSN }}, \ 1972 { "m32r_block_immediate_operand",{ CONST_INT }}, \ 1973 { "m32r_block_small_immediate_operand",{ CONST_INT }}, \ 1974 { "large_insn_p", { INSN, CALL_INSN, JUMP_INSN }}, \ 1975 { "seth_add3_operand", { SYMBOL_REF, LABEL_REF, CONST }}, 1976 1977