| /llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 328 copyPhysSubRegs(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc,const MCInstrDesc & MCID,unsigned int NumSubRegs,const unsigned * SubRegIdx,const TargetRegisterInfo * TRI) copyPhysSubRegs() argument
919 bool KillSrc = IsSrcReg ? MI.getOperand(2).isKill() : false; expandPostRAPseudo() local
966 bool KillSrc = MI.getOperand(1).isKill(); expandPostRAPseudo() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 734 unsigned KillSrc = getKillRegState(Src.isKill()); in expandCvtFPInt() local
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 268 emitGRX32Move(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & DL,unsigned DestReg,unsigned SrcReg,unsigned LowLowOpcode,unsigned Size,bool KillSrc,bool UndefSrc) const emitGRX32Move() argument
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1023 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc) copyPhysReg() argument
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 830 copyFromCPSR(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,unsigned DestReg,bool KillSrc,const ARMSubtarget & Subtarget) const copyFromCPSR() argument
850 copyToCPSR(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,unsigned SrcReg,bool KillSrc,const ARMSubtarget & Subtarget) const copyToCPSR() argument
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 610 reportIllegalCopy(const SIInstrInfo * TII,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc,const char * Msg="illegal VGPR to SGPR copy") reportIllegalCopy() argument
628 indirectCopyToAGPR(const SIInstrInfo & TII,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc,RegScavenger & RS,bool RegsOverlap,Register ImpDefSuperReg=Register (),Register ImpUseSuperReg=Register ()) indirectCopyToAGPR() argument
745 expandSGPRCopy(const SIInstrInfo & TII,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc,const TargetRegisterClass * RC,bool Forward) expandSGPRCopy() argument
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 4395 copyPhysRegTuple(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc,unsigned Opcode,ArrayRef<unsigned> Indices) const copyPhysRegTuple() argument
4422 copyGPRRegTuple(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,DebugLoc DL,unsigned DestReg,unsigned SrcReg,bool KillSrc,unsigned Opcode,unsigned ZeroReg,llvm::ArrayRef<unsigned> Indices) const copyGPRRegTuple() argument
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 320 copyPhysRegVector(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & DL,MCRegister DstReg,MCRegister SrcReg,bool KillSrc,const TargetRegisterClass * RegClass) const copyPhysRegVector() argument
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