Searched defs:IsVecInReg (Results 1 – 1 of 1) sorted by relevance
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ | ||
| H A D | TargetLowering.cpp | 2399 bool IsVecInReg = Op.getOpcode() == ISD::ZERO_EXTEND_VECTOR_INREG; SimplifyDemandedBits() local |